Patchwork [U-Boot] Tegra: Restore cp15 VBAR _start vector write for ARMv7

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Submitter Tom Warren
Date March 28, 2013, 5:26 p.m.
Message ID <1364491563-31109-1-git-send-email-twarren@nvidia.com>
Download mbox | patch
Permalink /patch/232144/
State Accepted
Delegated to: Tom Warren
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Comments

Tom Warren - March 28, 2013, 5:26 p.m.
A start vector fix was added by AneeshV for OMAP4 (commit 0d479b53),
and caused the old monilithic Tegra builds to hang due to an undefined
instruction trap. Previously, the code needed to run on both the
AVP (ARM7TDI) and A9, and the AVP doesn't have a CP15 register.
I corrected this in commit 6d6c0bae w/#ifndef CONFIG_TEGRA, but
now that we use SPL, and boot the AVP w/o any ARMv7 code, I can
revert my change, and make Aneesh's change apply to Tegra.

Signed-off-by: Tom Warren <twarren@nvidia.com>
---
 arch/arm/cpu/armv7/start.S | 2 --
 1 file changed, 2 deletions(-)
Marc Dietrich - March 28, 2013, 6:46 p.m.
Tom,

On Thursday 28 March 2013 10:26:03 Tom Warren wrote:
> A start vector fix was added by AneeshV for OMAP4 (commit 0d479b53),
> and caused the old monilithic Tegra builds to hang due to an undefined
> instruction trap. Previously, the code needed to run on both the
> AVP (ARM7TDI) and A9, and the AVP doesn't have a CP15 register.
> I corrected this in commit 6d6c0bae w/#ifndef CONFIG_TEGRA, but
> now that we use SPL, and boot the AVP w/o any ARMv7 code, I can
> revert my change, and make Aneesh's change apply to Tegra.

I applied your patch (and the one from 	Vincent [1]) but I still get no 
exception output (just hang) with the test case I posted earlier [2]. There 
must be still something wrong.

Marc

[1] http://u-boot.10912.n7.nabble.com/PATCH-armv7-do-not-relocate-start-twice-
td149815.html
[2] http://u-boot.10912.n7.nabble.com/unaligned-access-in-part-efi-c-
td150763.html


> 
> Signed-off-by: Tom Warren <twarren@nvidia.com>
> ---
>  arch/arm/cpu/armv7/start.S | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
> index c0e1849..7700315 100644
> --- a/arch/arm/cpu/armv7/start.S
> +++ b/arch/arm/cpu/armv7/start.S
> @@ -251,12 +251,10 @@ ENTRY(c_runtime_cpu_setup)
>  /*
>   * Move vector table
>   */
> -#if !defined(CONFIG_TEGRA)
>  	/* Set vector address in CP15 VBAR register */
>  	ldr     r0, =_start
>  	add     r0, r0, r9
>  	mcr     p15, 0, r0, c12, c0, 0  @Set VBAR
> -#endif /* !Tegra */
> 
>  	bx	lr

Patch

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index c0e1849..7700315 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -251,12 +251,10 @@  ENTRY(c_runtime_cpu_setup)
 /*
  * Move vector table
  */
-#if !defined(CONFIG_TEGRA)
 	/* Set vector address in CP15 VBAR register */
 	ldr     r0, =_start
 	add     r0, r0, r9
 	mcr     p15, 0, r0, c12, c0, 0  @Set VBAR
-#endif /* !Tegra */
 
 	bx	lr