From patchwork Thu Mar 28 15:32:56 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 232091 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 3CD722C00A2 for ; Fri, 29 Mar 2013 03:22:08 +1100 (EST) Received: from localhost ([::1]:44437 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ULExH-00024a-DU for incoming@patchwork.ozlabs.org; Thu, 28 Mar 2013 11:41:31 -0400 Received: from eggs.gnu.org ([208.118.235.92]:57455) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ULEpt-0001ij-QG for qemu-devel@nongnu.org; Thu, 28 Mar 2013 11:33:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ULEpq-0003e8-4o for qemu-devel@nongnu.org; Thu, 28 Mar 2013 11:33:53 -0400 Received: from mail-da0-x236.google.com ([2607:f8b0:400e:c00::236]:35192) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ULEpp-0003dx-RM for qemu-devel@nongnu.org; Thu, 28 Mar 2013 11:33:50 -0400 Received: by mail-da0-f54.google.com with SMTP id p1so4575504dad.27 for ; Thu, 28 Mar 2013 08:33:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=2LgTkN+vhTdZpQdLC7L7pTGEgxLYFFMYnZH031UK518=; b=n5f9F9K+xRVUt3Ca+nzAqoBTcziKJE+Wmq+ietYKBUfWj+GmfcyUmZc0mjJf1cZGN7 8qUcqljAtuBphm3iATrEalifGjZZExlYwb+svOnWuG6nccl+VukMydxRr16jTSiOjFfo mGhTY1jjjvSOz/jIvuPZBT0NoZDsHWl+Q/V+8DU0KS7RtoW7Ntjk2f7/kiNJvh1FC9P8 4y76h6COYsQ8aSpHIhcpKh1lVm0CRmeGLIwX61viR4t5OVY1naZ2z/E91ZRM3O9i6Zms XWMdCOqVLwAjH+nGg22mH2j+Dd/a69r2qiqLmwMTS+mABX1+OhaNSoCK18mdkTPWon5N NCjQ== X-Received: by 10.68.224.65 with SMTP id ra1mr35967776pbc.55.1364484829199; Thu, 28 Mar 2013 08:33:49 -0700 (PDT) Received: from fremont.twiddle.net (50-194-63-110-static.hfc.comcastbusiness.net. [50.194.63.110]) by mx.google.com with ESMTPS id kb3sm25939542pbc.21.2013.03.28.08.33.46 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 28 Mar 2013 08:33:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 28 Mar 2013 08:32:56 -0700 Message-Id: <1364484781-15561-16-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1364484781-15561-1-git-send-email-rth@twiddle.net> References: <1364484781-15561-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c00::236 Cc: Peter Maydell , Aurelien Jarno Subject: [Qemu-devel] [PATCH v3 15/20] tcg-arm: Cleanup most primitive load store subroutines X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Use even more primitive helper functions to avoid lots of duplicated code. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.c | 235 ++++++++++++++++++++++++--------------------------- 1 file changed, 111 insertions(+), 124 deletions(-) diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index 6de5e90..fb8c96d 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-target.c @@ -306,7 +306,7 @@ static inline int tcg_target_const_match(tcg_target_long val, #define TO_CPSR (1 << 20) -enum arm_data_opc_e { +typedef enum { ARITH_AND = 0x0 << 21, ARITH_EOR = 0x1 << 21, ARITH_SUB = 0x2 << 21, @@ -322,7 +322,26 @@ enum arm_data_opc_e { ARITH_MOV = 0xd << 21, ARITH_BIC = 0xe << 21, ARITH_MVN = 0xf << 21, -}; + + INSN_LDR_IMM = 0x04100000, + INSN_LDR_REG = 0x06100000, + INSN_STR_IMM = 0x04000000, + INSN_STR_REG = 0x06000000, + + INSN_LDRH_IMM = 0x005000b0, + INSN_LDRH_REG = 0x001000b0, + INSN_LDRSH_IMM = 0x005000f0, + INSN_LDRSH_REG = 0x001000f0, + INSN_STRH_IMM = 0x004000b0, + INSN_STRH_REG = 0x000000b0, + + INSN_LDRB_IMM = 0x04500000, + INSN_LDRB_REG = 0x06500000, + INSN_LDRSB_IMM = 0x005000d0, + INSN_LDRSB_REG = 0x001000d0, + INSN_STRB_IMM = 0x04400000, + INSN_STRB_REG = 0x06400000, +} ARMInsn; #define SHIFT_IMM_LSL(im) (((im) << 7) | 0x00) #define SHIFT_IMM_LSR(im) (((im) << 7) | 0x20) @@ -748,187 +767,155 @@ static inline void tcg_out_deposit(TCGContext *s, int cond, TCGReg rd, | (ofs << 7) | ((ofs + len - 1) << 16)); } -static inline void tcg_out_ld32_12(TCGContext *s, int cond, - int rd, int rn, tcg_target_long im) +/* Note that this routine is used for both LDR and LDRH formats, so we do + not wish to include an immediate shift at this point. */ +static void tcg_out_memop_r(TCGContext *s, int cond, ARMInsn opc, TCGReg rt, + TCGReg rn, TCGReg rm, bool u, bool p, bool w) { - if (im >= 0) - tcg_out32(s, (cond << 28) | 0x05900000 | - (rn << 16) | (rd << 12) | (im & 0xfff)); - else - tcg_out32(s, (cond << 28) | 0x05100000 | - (rn << 16) | (rd << 12) | ((-im) & 0xfff)); + tcg_out32(s, (cond << 28) | opc | (u << 23) | (p << 24) + | (w << 21) | (rn << 16) | (rt << 12) | rm); +} + +static void tcg_out_memop_8(TCGContext *s, int cond, ARMInsn opc, TCGReg rt, + TCGReg rn, int imm8, bool p, bool w) +{ + bool u = 1; + if (imm8 < 0) { + imm8 = -imm8; + u = 0; + } + tcg_out32(s, (cond << 28) | opc | (u << 23) | (p << 24) | (w << 21) | + (rn << 16) | (rt << 12) | ((imm8 & 0xf0) << 4) | (imm8 & 0xf)); +} + +static void tcg_out_memop_12(TCGContext *s, int cond, ARMInsn opc, TCGReg rt, + TCGReg rn, int imm12, bool p, bool w) +{ + bool u = 1; + if (imm12 < 0) { + imm12 = -imm12; + u = 0; + } + tcg_out32(s, (cond << 28) | opc | (u << 23) | (p << 24) | (w << 21) | + (rn << 16) | (rt << 12) | imm12); +} + +static inline void tcg_out_ld32_12(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, int imm12) +{ + tcg_out_memop_12(s, cond, INSN_LDR_IMM, rt, rn, imm12, 1, 0); } /* Offset pre-increment with base writeback. */ -static inline void tcg_out_ld32_12wb(TCGContext *s, int cond, - int rd, int rn, tcg_target_long im) +static inline void tcg_out_ld32_12wb(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, int imm12) { /* ldr with writeback and both register equals is UNPREDICTABLE */ assert(rd != rn); - - if (im >= 0) { - tcg_out32(s, (cond << 28) | 0x05b00000 | - (rn << 16) | (rd << 12) | (im & 0xfff)); - } else { - tcg_out32(s, (cond << 28) | 0x05300000 | - (rn << 16) | (rd << 12) | ((-im) & 0xfff)); - } + tcg_out_memop_12(s, cond, INSN_LDR_IMM, rt, rn, imm12, 1, 1); } -static inline void tcg_out_st32_12(TCGContext *s, int cond, - int rd, int rn, tcg_target_long im) +static inline void tcg_out_st32_12(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, int imm12) { - if (im >= 0) - tcg_out32(s, (cond << 28) | 0x05800000 | - (rn << 16) | (rd << 12) | (im & 0xfff)); - else - tcg_out32(s, (cond << 28) | 0x05000000 | - (rn << 16) | (rd << 12) | ((-im) & 0xfff)); + tcg_out_memop_12(s, cond, INSN_STR_IMM, rt, rn, imm12, 1, 0); } -static inline void tcg_out_ld32_r(TCGContext *s, int cond, - int rd, int rn, int rm) +static inline void tcg_out_ld32_r(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, TCGReg rm) { - tcg_out32(s, (cond << 28) | 0x07900000 | - (rn << 16) | (rd << 12) | rm); + tcg_out_memop_r(s, cond, INSN_LDR_REG, rt, rn, rm, 1, 1, 0); } -static inline void tcg_out_st32_r(TCGContext *s, int cond, - int rd, int rn, int rm) +static inline void tcg_out_st32_r(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, TCGReg rm) { - tcg_out32(s, (cond << 28) | 0x07800000 | - (rn << 16) | (rd << 12) | rm); + tcg_out_memop_r(s, cond, INSN_STR_REG, rt, rn, rm, 1, 1, 0); } /* Register pre-increment with base writeback. */ -static inline void tcg_out_ld32_rwb(TCGContext *s, int cond, - int rd, int rn, int rm) +static inline void tcg_out_ld32_rwb(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, TCGReg rm) { - tcg_out32(s, (cond << 28) | 0x07b00000 | - (rn << 16) | (rd << 12) | rm); + tcg_out_memop_r(s, cond, INSN_LDR_REG, rt, rn, rm, 1, 1, 1); } -static inline void tcg_out_st32_rwb(TCGContext *s, int cond, - int rd, int rn, int rm) +static inline void tcg_out_st32_rwb(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, TCGReg rm) { - tcg_out32(s, (cond << 28) | 0x07a00000 | - (rn << 16) | (rd << 12) | rm); + tcg_out_memop_r(s, cond, INSN_STR_REG, rt, rn, rm, 1, 1, 1); } -static inline void tcg_out_ld16u_8(TCGContext *s, int cond, - int rd, int rn, tcg_target_long im) +static inline void tcg_out_ld16u_8(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, int imm8) { - if (im >= 0) - tcg_out32(s, (cond << 28) | 0x01d000b0 | - (rn << 16) | (rd << 12) | - ((im & 0xf0) << 4) | (im & 0xf)); - else - tcg_out32(s, (cond << 28) | 0x015000b0 | - (rn << 16) | (rd << 12) | - (((-im) & 0xf0) << 4) | ((-im) & 0xf)); + tcg_out_memop_8(s, cond, INSN_LDRH_IMM, rt, rn, imm8, 1, 0); } -static inline void tcg_out_st16_8(TCGContext *s, int cond, - int rd, int rn, tcg_target_long im) +static inline void tcg_out_st16_8(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, int imm8) { - if (im >= 0) - tcg_out32(s, (cond << 28) | 0x01c000b0 | - (rn << 16) | (rd << 12) | - ((im & 0xf0) << 4) | (im & 0xf)); - else - tcg_out32(s, (cond << 28) | 0x014000b0 | - (rn << 16) | (rd << 12) | - (((-im) & 0xf0) << 4) | ((-im) & 0xf)); + tcg_out_memop_8(s, cond, INSN_STRH_IMM, rt, rn, imm8, 1, 0); } -static inline void tcg_out_ld16u_r(TCGContext *s, int cond, - int rd, int rn, int rm) +static inline void tcg_out_ld16u_r(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, TCGReg rm) { - tcg_out32(s, (cond << 28) | 0x019000b0 | - (rn << 16) | (rd << 12) | rm); + tcg_out_memop_r(s, cond, INSN_LDRH_REG, rt, rn, rm, 1, 1, 0); } -static inline void tcg_out_st16_r(TCGContext *s, int cond, - int rd, int rn, int rm) +static inline void tcg_out_st16_r(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, TCGReg rm) { - tcg_out32(s, (cond << 28) | 0x018000b0 | - (rn << 16) | (rd << 12) | rm); + tcg_out_memop_r(s, cond, INSN_STRH_REG, rt, rn, rm, 1, 1, 0); } -static inline void tcg_out_ld16s_8(TCGContext *s, int cond, - int rd, int rn, tcg_target_long im) +static inline void tcg_out_ld16s_8(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, int imm8) { - if (im >= 0) - tcg_out32(s, (cond << 28) | 0x01d000f0 | - (rn << 16) | (rd << 12) | - ((im & 0xf0) << 4) | (im & 0xf)); - else - tcg_out32(s, (cond << 28) | 0x015000f0 | - (rn << 16) | (rd << 12) | - (((-im) & 0xf0) << 4) | ((-im) & 0xf)); + tcg_out_memop_8(s, cond, INSN_LDRSH_IMM, rt, rn, imm8, 1, 0); } -static inline void tcg_out_ld16s_r(TCGContext *s, int cond, - int rd, int rn, int rm) +static inline void tcg_out_ld16s_r(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, TCGReg rm) { - tcg_out32(s, (cond << 28) | 0x019000f0 | - (rn << 16) | (rd << 12) | rm); + tcg_out_memop_r(s, cond, INSN_LDRSH_REG, rt, rn, rm, 1, 1, 0); } -static inline void tcg_out_ld8_12(TCGContext *s, int cond, - int rd, int rn, tcg_target_long im) +static inline void tcg_out_ld8_12(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, int imm12) { - if (im >= 0) - tcg_out32(s, (cond << 28) | 0x05d00000 | - (rn << 16) | (rd << 12) | (im & 0xfff)); - else - tcg_out32(s, (cond << 28) | 0x05500000 | - (rn << 16) | (rd << 12) | ((-im) & 0xfff)); + tcg_out_memop_12(s, cond, INSN_LDRB_IMM, rt, rn, imm12, 1, 0); } -static inline void tcg_out_st8_12(TCGContext *s, int cond, - int rd, int rn, tcg_target_long im) +static inline void tcg_out_st8_12(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, int imm12) { - if (im >= 0) - tcg_out32(s, (cond << 28) | 0x05c00000 | - (rn << 16) | (rd << 12) | (im & 0xfff)); - else - tcg_out32(s, (cond << 28) | 0x05400000 | - (rn << 16) | (rd << 12) | ((-im) & 0xfff)); + tcg_out_memop_12(s, cond, INSN_STRB_IMM, rt, rn, imm12, 1, 0); } -static inline void tcg_out_ld8_r(TCGContext *s, int cond, - int rd, int rn, int rm) +static inline void tcg_out_ld8_r(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, TCGReg rm) { - tcg_out32(s, (cond << 28) | 0x07d00000 | - (rn << 16) | (rd << 12) | rm); + tcg_out_memop_r(s, cond, INSN_LDRB_REG, rt, rn, rm, 1, 1, 0); } -static inline void tcg_out_st8_r(TCGContext *s, int cond, - int rd, int rn, int rm) +static inline void tcg_out_st8_r(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, TCGReg rm) { - tcg_out32(s, (cond << 28) | 0x07c00000 | - (rn << 16) | (rd << 12) | rm); + tcg_out_memop_r(s, cond, INSN_STRB_REG, rt, rn, rm, 1, 1, 0); } -static inline void tcg_out_ld8s_8(TCGContext *s, int cond, - int rd, int rn, tcg_target_long im) +static inline void tcg_out_ld8s_8(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, int imm8) { - if (im >= 0) - tcg_out32(s, (cond << 28) | 0x01d000d0 | - (rn << 16) | (rd << 12) | - ((im & 0xf0) << 4) | (im & 0xf)); - else - tcg_out32(s, (cond << 28) | 0x015000d0 | - (rn << 16) | (rd << 12) | - (((-im) & 0xf0) << 4) | ((-im) & 0xf)); + tcg_out_memop_8(s, cond, INSN_LDRSB_IMM, rt, rn, imm8, 1, 0); } -static inline void tcg_out_ld8s_r(TCGContext *s, int cond, - int rd, int rn, int rm) +static inline void tcg_out_ld8s_r(TCGContext *s, int cond, TCGReg rt, + TCGReg rn, TCGReg rm) { - tcg_out32(s, (cond << 28) | 0x019000d0 | - (rn << 16) | (rd << 12) | rm); + tcg_out_memop_r(s, cond, INSN_LDRSB_REG, rt, rn, rm, 1, 1, 0); } static inline void tcg_out_ld32u(TCGContext *s, int cond,