From patchwork Wed Mar 27 21:20:38 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Emilio_L=C3=B3pez?= X-Patchwork-Id: 231833 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 41EB92C00CE for ; Thu, 28 Mar 2013 08:26:40 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UKxoN-0007wJ-3C; Wed, 27 Mar 2013 21:23:11 +0000 Received: from [2606:3f00:60:21c:d00d:c0de:4:f00d] (helo=zetta.elopez.com.ar) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UKxo4-0007te-PN for linux-arm-kernel@lists.infradead.org; Wed, 27 Mar 2013 21:22:54 +0000 Received: from 201-212-118-238.prima.net.ar ([201.212.118.238] helo=desktop.lan) by zetta.elopez.com.ar with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) id 1UKxo0-0005Sk-Al; Wed, 27 Mar 2013 18:22:48 -0300 From: =?UTF-8?q?Emilio=20L=C3=B3pez?= To: Maxime Ripard , Mike Turquette , Linus Walleij Subject: [PATCH v2 2/7] arm: sunxi: Add clock definitions for AXI, AHB, APB0, APB1 gates Date: Wed, 27 Mar 2013 18:20:38 -0300 Message-Id: <1364419243-18446-3-git-send-email-emilio@elopez.com.ar> X-Mailer: git-send-email 1.8.2 In-Reply-To: <1364419243-18446-1-git-send-email-emilio@elopez.com.ar> References: <1363962042-29536-1-git-send-email-emilio@elopez.com.ar> <1364419243-18446-1-git-send-email-emilio@elopez.com.ar> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130327_172253_001098_BF1E448C X-CRM114-Status: UNSURE ( 7.27 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.1 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.8 RDNS_NONE Delivered to internal network by a host with no rDNS Cc: Alejandro Mery , =?UTF-8?q?Emilio=20L=C3=B3pez?= , Stefan Roese , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org This commit adds the corresponding DT bindings for all the AXI, AHB, APB0 and APB1 gates. Signed-off-by: Emilio López --- Changes from v1: - renamed compatible strings to sun4i - rename twi gates to i2c arch/arm/boot/dts/sunxi.dtsi | 49 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/arm/boot/dts/sunxi.dtsi b/arch/arm/boot/dts/sunxi.dtsi index 40392de..87b2cce 100644 --- a/arch/arm/boot/dts/sunxi.dtsi +++ b/arch/arm/boot/dts/sunxi.dtsi @@ -80,6 +80,14 @@ clocks = <&cpu>; }; + axi_gates: axi_gates@01c2005c { + #clock-cells = <1>; + compatible = "allwinner,sun4i-axi-gates-clk"; + reg = <0x01c2005c 0x4>; + clocks = <&axi>; + clock-output-names = "axi_dram"; + }; + ahb: ahb@01c20054 { #clock-cells = <0>; compatible = "allwinner,sun4i-ahb-clk"; @@ -87,6 +95,24 @@ clocks = <&axi>; }; + ahb_gates: ahb_gates@01c20060 { + #clock-cells = <1>; + compatible = "allwinner,sun4i-ahb-gates-clk"; + reg = <0x01c20060 0x8>; + clocks = <&ahb>; + clock-output-names = "ahb_usb0", "ahb_ehci0", + "ahb_ohci0", "ahb_ehci1", "ahb_ohci1", "ahb_ss", + "ahb_dma", "ahb_bist", "ahb_mmc0", "ahb_mmc1", + "ahb_mmc2", "ahb_mmc3", "ahb_ms", "ahb_nand", + "ahb_sdram", "ahb_ace", "ahb_emac", "ahb_ts", + "ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_spi3", + "ahb_pata", "ahb_sata", "ahb_gps", "ahb_ve", + "ahb_tvd", "ahb_tve0", "ahb_tve1", "ahb_lcd0", + "ahb_lcd1", "ahb_csi0", "ahb_csi1", "ahb_hdmi", + "ahb_de_be0", "ahb_de_be1", "ahb_de_fe0", + "ahb_de_fe1", "ahb_mp", "ahb_mali400"; + }; + apb0: apb0@01c20054 { #clock-cells = <0>; compatible = "allwinner,sun4i-apb0-clk"; @@ -94,6 +120,16 @@ clocks = <&ahb>; }; + apb0_gates: apb0_gates@01c20068 { + #clock-cells = <1>; + compatible = "allwinner,sun4i-apb0-gates-clk"; + reg = <0x01c20068 0x4>; + clocks = <&apb0>; + clock-output-names = "apb0_codec", "apb0_spdif", + "apb0_ac97", "apb0_iis", "apb0_pio", "apb0_ir0", + "apb0_ir1", "apb0_keypad"; + }; + /* dummy is pll62 */ apb1_mux: apb1_mux@01c20058 { #clock-cells = <0>; @@ -108,6 +144,19 @@ reg = <0x01c20058 0x4>; clocks = <&apb1_mux>; }; + + apb1_gates: apb1_gates@01c2006c { + #clock-cells = <1>; + compatible = "allwinner,sun4i-apb1-gates-clk"; + reg = <0x01c2006c 0x4>; + clocks = <&apb1>; + clock-output-names = "apb1_i2c0", "apb1_i2c1", + "apb1_i2c2", "apb1_can", "apb1_scr", + "apb1_ps20", "apb1_ps21", "apb1_uart0", + "apb1_uart1", "apb1_uart2", "apb1_uart3", + "apb1_uart4", "apb1_uart5", "apb1_uart6", + "apb1_uart7"; + }; }; soc {