From patchwork Wed Mar 27 08:22:45 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Cheng X-Patchwork-Id: 231607 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "localhost", Issuer "www.qmailtoaster.com" (not verified)) by ozlabs.org (Postfix) with ESMTPS id D88382C0098 for ; Wed, 27 Mar 2013 19:24:03 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:references:in-reply-to:subject:date:message-id :mime-version:content-type; q=dns; s=default; b=OMtePsuuM1KPgHFY 011jiiZ92kYcLWY9zjfzBb6TVjIDQpg4uTTGLUV9Doa4UJmUie3S6VExrdD1h0VB lRBUQL8sLJKKQVCjtw9wBtUmrqdAi+fSYKDxeyi9wh7LB+GB9a+/2pkR49CJpqWV yyUS/PNn6NGb2mZOzoMbHN8lHxk= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:references:in-reply-to:subject:date:message-id :mime-version:content-type; s=default; bh=S1QW2Izc+0vgvSRxLTWaHM 0EKcU=; b=TwRioD+CdhqINUwCzyvThX9whPHolOn/6EbvRdOdzywmLh99igthem YTfI4BBZkEt3hv4wkwmQ0XKx2Rd5FFEg9v8nllGgk6nZk5NXW80K2r53F+/sgDAF cFm80j2dMy/lKl2SDaFeWNNPIY0zhIsa0zxugAPnz3j2VmQBDGl7o= Received: (qmail 28491 invoked by alias); 27 Mar 2013 08:23:52 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 28454 invoked by uid 89); 27 Mar 2013 08:23:44 -0000 X-Spam-SWARE-Status: No, score=-4.1 required=5.0 tests=AWL, BAYES_00, KHOP_RCVD_UNTRUST, KHOP_THREADED, MSGID_MULTIPLE_AT, RCVD_IN_DNSWL_LOW, RCVD_IN_HOSTKARMA_W, RCVD_IN_HOSTKARMA_WL autolearn=ham version=3.3.1 Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.84/v0.84-167-ge50287c) with ESMTP; Wed, 27 Mar 2013 08:23:41 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Wed, 27 Mar 2013 08:23:38 +0000 Received: from Binsh02 ([10.1.255.212]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.0); Wed, 27 Mar 2013 08:23:37 +0000 From: "Bin Cheng" To: "Richard Earnshaw" Cc: References: <002601ce29fc$afd803b0$0f880b10$@cheng@arm.com> <51517F0D.30008@arm.com> In-Reply-To: <51517F0D.30008@arm.com> Subject: RE: [PATCH GCC/ARM]Fix rtx cost for Thumb1 Date: Wed, 27 Mar 2013 16:22:45 +0800 Message-ID: <003601ce2ac4$44487940$ccd96bc0$@cheng@arm.com> MIME-Version: 1.0 X-MC-Unique: 113032708233817301 X-Virus-Found: No > -----Original Message----- > From: Richard Earnshaw > Sent: Tuesday, March 26, 2013 6:57 PM > To: Bin Cheng > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [PATCH GCC/ARM]Fix rtx cost for Thumb1 > > On 26/03/13 08:34, Bin Cheng wrote: > > Hi, > > As reported in PR56102, arm back end returns wrong rtx cost for > > pattern SET/ASHIFT/ASHIFTRT/LSHIFTRT/ROTATERT with multi-word mode. > > This causes GCC skipping the split process in lower-subreg.c, and > > generating bigger constant pool. > > > > This patch fixes the issue. Tested on arm-none-eabi/thumb1/O2/Os, ok > > for trunk? > > > > Thanks. > > > > 2013-03-26 Bin Cheng > > > > PR target/56102 > > * config/arm/arm.c (thumb1_rtx_costs, thumb1_size_rtx_costs): Fix > > rtx costs for SET/ASHIFT/ASHIFTRT/LSHIFTRT/ROTATERT patterns with > > mult-word mode. > > > Sorry that I mis-sent the old version patch. The right one is attached now. Since the difference is obvious and was approved before this thread, I committed it directly as revision 197155. Thanks. Index: gcc/ChangeLog =================================================================== --- gcc/ChangeLog (revision 197154) +++ gcc/ChangeLog (working copy) @@ -1,3 +1,10 @@ +2013-03-27 Bin Cheng + + PR target/56102 + * config/arm/arm.c (thumb1_rtx_costs, thumb1_size_rtx_costs): Fix + rtx costs for SET/ASHIFT/ASHIFTRT/LSHIFTRT/ROTATERT patterns with + mult-word mode. + 2013-03-27 Andreas Krebbel * config/s390/s390.h (TARGET_FLT_EVAL_METHOD): Define. Index: gcc/config/arm/arm.c =================================================================== --- gcc/config/arm/arm.c (revision 197154) +++ gcc/config/arm/arm.c (working copy) @@ -7116,7 +7116,7 @@ static inline int thumb1_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer) { enum machine_mode mode = GET_MODE (x); - int total; + int total, words; switch (code) { @@ -7124,6 +7124,8 @@ thumb1_rtx_costs (rtx x, enum rtx_code code, enum case ASHIFTRT: case LSHIFTRT: case ROTATERT: + return (mode == SImode) ? COSTS_N_INSNS (1) : COSTS_N_INSNS (2); + case PLUS: case MINUS: case COMPARE: @@ -7147,7 +7149,10 @@ thumb1_rtx_costs (rtx x, enum rtx_code code, enum return COSTS_N_INSNS (1) + 16; case SET: - return (COSTS_N_INSNS (1) + /* A SET doesn't have a mode, so let's look at the SET_DEST to get + the mode. */ + words = ARM_NUM_INTS (GET_MODE_SIZE (GET_MODE (SET_DEST (x)))); + return (COSTS_N_INSNS (words) + 4 * ((MEM_P (SET_SRC (x))) + MEM_P (SET_DEST (x)))); @@ -7844,6 +7849,7 @@ static inline int thumb1_size_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer) { enum machine_mode mode = GET_MODE (x); + int words; switch (code) { @@ -7851,6 +7857,8 @@ thumb1_size_rtx_costs (rtx x, enum rtx_code code, case ASHIFTRT: case LSHIFTRT: case ROTATERT: + return (mode == SImode) ? COSTS_N_INSNS (1) : COSTS_N_INSNS (2); + case PLUS: case MINUS: case COMPARE: @@ -7869,7 +7877,10 @@ thumb1_size_rtx_costs (rtx x, enum rtx_code code, return COSTS_N_INSNS (1); case SET: - return (COSTS_N_INSNS (1) + /* A SET doesn't have a mode, so let's look at the SET_DEST to get + the mode. */ + words = ARM_NUM_INTS (GET_MODE_SIZE (GET_MODE (SET_DEST (x)))); + return (COSTS_N_INSNS (words) + 4 * ((MEM_P (SET_SRC (x))) + MEM_P (SET_DEST (x))));