Patchwork [committed] TILE-Gx: add __insn_shufflebytes1 intrinsic

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Submitter Walter Lee
Date March 26, 2013, 6:58 a.m.
Message ID <201303260658.r2Q6w38c017420@farm-0001.internal.tilera.com>
Download mbox | patch
Permalink /patch/231104/
State New
Headers show

Comments

Walter Lee - March 26, 2013, 6:58 a.m.
This patch adds the __insn_shufflebytes1, which takes only one argument.

  result = __insn_shufflebytes1(input, select);

is equivalent to:

  result = __insn_shufflebytes(result, input, select);

It has the advantage that the compiler will not waste a cycle
initializing result unnecessarily.  It is the user's responsibility to
ensure that the select value is only selecting bytes from the second
operand.  This has been backported to 4.7 and 4.8.

	* config/tilegx/tilegx-builtins.h (enum tilegx_builtin): Add
        TILEGX_INSN_SHUFFLEBYTES1.
	* config/tilegx/tilegx.c (tilegx_builtin_info): Add entry for
        shufflebytes1.
        (tilegx_builtins): Ditto.
	* config/tilegx/tilegx.md (insn_shufflebytes1): New pattern.

Patch

Index: gcc/config/tilegx/tilegx.md
===================================================================
--- gcc/config/tilegx/tilegx.md	(revision 197079)
+++ gcc/config/tilegx/tilegx.md	(working copy)
@@ -3959,6 +3959,15 @@ 
   "shufflebytes\t%0, %r2, %r3"
   [(set_attr "type" "X0")])
 
+(define_insn "insn_shufflebytes1"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+        (unspec:DI [(match_operand:DI 1 "reg_or_0_operand" "rO")
+                    (match_operand:DI 2 "reg_or_0_operand" "rO")]
+                   UNSPEC_INSN_SHUFFLEBYTES))]
+  ""
+  "shufflebytes\t%0, %r1, %r2"
+  [(set_attr "type" "X0")])
+
 ;; stores
 
 (define_expand "insn_st"
Index: gcc/config/tilegx/tilegx-builtins.h
===================================================================
--- gcc/config/tilegx/tilegx-builtins.h	(revision 197072)
+++ gcc/config/tilegx/tilegx-builtins.h	(working copy)
@@ -193,6 +193,7 @@  enum tilegx_builtin
   TILEGX_INSN_SHRU,
   TILEGX_INSN_SHRUX,
   TILEGX_INSN_SHUFFLEBYTES,
+  TILEGX_INSN_SHUFFLEBYTES1,
   TILEGX_INSN_ST,
   TILEGX_INSN_ST1,
   TILEGX_INSN_ST2,
Index: gcc/config/tilegx/tilegx.c
===================================================================
--- gcc/config/tilegx/tilegx.c	(revision 197074)
+++ gcc/config/tilegx/tilegx.c	(working copy)
@@ -2897,6 +2897,7 @@  static struct tile_builtin_info tilegx_b
   { CODE_FOR_lshrdi3,                   NULL }, /* shru */
   { CODE_FOR_lshrsi3,                   NULL }, /* shrux */
   { CODE_FOR_insn_shufflebytes,         NULL }, /* shufflebytes */
+  { CODE_FOR_insn_shufflebytes1,        NULL }, /* shufflebytes1 */
   { CODE_FOR_insn_st,                   NULL }, /* st */
   { CODE_FOR_insn_st1,                  NULL }, /* st1 */
   { CODE_FOR_insn_st2,                  NULL }, /* st2 */
@@ -3225,6 +3226,7 @@  static const struct tilegx_builtin_def t
   { "__insn_shrux",              TILEGX_INSN_SHRUX,              true,  "iii"  },
   { "__insn_shruxi",             TILEGX_INSN_SHRUX,              true,  "iii"  },
   { "__insn_shufflebytes",       TILEGX_INSN_SHUFFLEBYTES,       true,  "llll" },
+  { "__insn_shufflebytes1",      TILEGX_INSN_SHUFFLEBYTES1,      true,  "lll"  },
   { "__insn_st",                 TILEGX_INSN_ST,                 false, "vpl"  },
   { "__insn_st1",                TILEGX_INSN_ST1,                false, "vpl"  },
   { "__insn_st2",                TILEGX_INSN_ST2,                false, "vpl"  },