From patchwork Mon Mar 25 17:40:20 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: York Sun X-Patchwork-Id: 230854 X-Patchwork-Delegate: afleming@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id E3BFB2C0095 for ; Tue, 26 Mar 2013 04:49:27 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9D03E4A3B4; Mon, 25 Mar 2013 18:46:57 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id fyEZMWoGwHg3; Mon, 25 Mar 2013 18:46:57 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 692D84A3B5; Mon, 25 Mar 2013 18:43:01 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 671404A202 for ; Mon, 25 Mar 2013 18:42:26 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id I9+X5C0l4Cbt for ; Mon, 25 Mar 2013 18:42:25 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from va3outboundpool.messaging.microsoft.com (va3ehsobe002.messaging.microsoft.com [216.32.180.12]) by theia.denx.de (Postfix) with ESMTPS id 21A454A313 for ; Mon, 25 Mar 2013 18:41:32 +0100 (CET) Received: from mail144-va3-R.bigfish.com (10.7.14.225) by VA3EHSOBE009.bigfish.com (10.7.40.29) with Microsoft SMTP Server id 14.1.225.23; Mon, 25 Mar 2013 17:41:28 +0000 Received: from mail144-va3 (localhost [127.0.0.1]) by mail144-va3-R.bigfish.com (Postfix) with ESMTP id E733B4600D6 for ; Mon, 25 Mar 2013 17:41:27 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1f42h1ee6h1de0h1202h1e76h1d1ah1d2ahzz8275bhz2dh2a8h668h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1155h) Received: from mail144-va3 (localhost.localdomain [127.0.0.1]) by mail144-va3 (MessageSwitch) id 1364233285972720_25125; Mon, 25 Mar 2013 17:41:25 +0000 (UTC) Received: from VA3EHSMHS015.bigfish.com (unknown [10.7.14.247]) by mail144-va3.bigfish.com (Postfix) with ESMTP id CBC082A0051 for ; Mon, 25 Mar 2013 17:41:25 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by VA3EHSMHS015.bigfish.com (10.7.99.25) with Microsoft SMTP Server (TLS) id 14.1.225.23; Mon, 25 Mar 2013 17:41:22 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-004.039d.mgd.msft.net (10.84.1.14) with Microsoft SMTP Server (TLS) id 14.2.328.11; Mon, 25 Mar 2013 17:40:51 +0000 Received: from oslab-l1.am.freescale.net ([10.214.80.134]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id r2PHeQAF012478; Mon, 25 Mar 2013 10:40:50 -0700 From: York Sun To: Date: Mon, 25 Mar 2013 10:40:20 -0700 Message-ID: <1364233225-31262-24-git-send-email-yorksun@freescale.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1364233225-31262-1-git-send-email-yorksun@freescale.com> References: <1364233225-31262-1-git-send-email-yorksun@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: u-boot@lists.denx.de Subject: [U-Boot] [Patch v2, batch 4 24/29] powerpc/B4: Merge B4420 and B4860 in config_mpc85xx.h X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Poonam Aggrwal B4420 is a subset of B4860. Merge them in config_mpc85xx.h to simplify the defines. - Removed #define CONFIG_SYS_FSL_NUM_CLUSTERS as this is used nowhere. - defined CONFIG_SYS_NUM_FM1_10GEC to 0 for B4420 as it does not have 10G. Also move CONFIG_E6500 out of B4860QDSds.h into config_mpc85xx.h. Signed-off-by: Poonam Aggrwal --- arch/powerpc/include/asm/config_mpc85xx.h | 36 ++++++++++------------------- include/configs/B4860QDS.h | 1 - 2 files changed, 12 insertions(+), 25 deletions(-) diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index c03b0af..0862b68 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -559,22 +559,18 @@ #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 #define CONFIG_SYS_FSL_PCI_VER_3_X -#elif defined(CONFIG_PPC_B4420) +#elif defined(CONFIG_PPC_B4860) || defined(CONFIG_PPC_B4420) +#define CONFIG_E6500 #define CONFIG_SYS_PPC64 /* 64-bit core */ #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ #define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* Freescale Chassis generation 2 */ -#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4 #define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */ -#define CONFIG_MAX_CPUS 2 -#define CONFIG_SYS_FSL_NUM_CC_PLLS 4 #define CONFIG_SYS_FSL_NUM_LAWS 32 #define CONFIG_SYS_FSL_SEC_COMPAT 4 #define CONFIG_SYS_NUM_FMAN 1 -#define CONFIG_SYS_NUM_FM1_DTSEC 4 -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_7 -#define CONFIG_SYS_FSL_IFC_BANK_COUNT 4 #define CONFIG_SYS_FMAN_V3 +#define CONFIG_SYS_FSL_IFC_BANK_COUNT 4 #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 #define CONFIG_SYS_FSL_TBCLK_DIV 16 #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4" @@ -582,32 +578,24 @@ #define CONFIG_SYS_FSL_ERRATUM_A_004934 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 -#elif defined(CONFIG_PPC_B4860) -#define CONFIG_SYS_PPC64 /* 64-bit core */ -#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ -#define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* Freescale Chassis generation 2 */ +#ifdef CONFIG_PPC_B4860 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4 -#define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */ #define CONFIG_MAX_CPUS 4 #define CONFIG_SYS_FSL_NUM_CC_PLLS 4 -#define CONFIG_SYS_FSL_NUM_LAWS 32 -#define CONFIG_SYS_FSL_SEC_COMPAT 4 -#define CONFIG_SYS_NUM_FMAN 1 #define CONFIG_SYS_NUM_FM1_DTSEC 6 #define CONFIG_SYS_NUM_FM1_10GEC 2 #define CONFIG_NUM_DDR_CONTROLLERS 2 -#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_7 -#define CONFIG_SYS_FSL_IFC_BANK_COUNT 4 -#define CONFIG_SYS_FMAN_V3 -#define CONFIG_SYS_FM_MURAM_SIZE 0x60000 -#define CONFIG_SYS_FSL_TBCLK_DIV 16 -#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4" #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 -#define CONFIG_SYS_FSL_USB1_PHY_ENABLE -#define CONFIG_SYS_FSL_ERRATUM_A_004934 -#define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 +#else +#define CONFIG_MAX_CPUS 2 +#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 2 +#define CONFIG_SYS_FSL_NUM_CC_PLLS 4 +#define CONFIG_SYS_NUM_FM1_DTSEC 4 +#define CONFIG_SYS_NUM_FM1_10GEC 0 +#define CONFIG_NUM_DDR_CONTROLLERS 1 +#endif #elif defined(CONFIG_PPC_T1040) #define CONFIG_E5500 diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index cfab1e8..65f8a22 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -36,7 +36,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE -#define CONFIG_E6500 #define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */