Patchwork [U-Boot,v2,batch,4,17/29] Enable XAUI interface for B4860QDS

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Submitter York Sun
Date March 25, 2013, 5:40 p.m.
Message ID <1364233225-31262-17-git-send-email-yorksun@freescale.com>
Download mbox | patch
Permalink /patch/230845/
State Accepted, archived
Delegated to: Andy Fleming
Headers show

Comments

York Sun - March 25, 2013, 5:40 p.m.
From: Suresh Gupta <suresh.gupta@freescale.com>

- Added SERDES2 PRTCLs = 0x98, 0x9E
- Default Phy Addresses for Teranetics PHY on XAUI card
	The PHY addresses of Teranetics PHY on XAUI riser card are assigned
	based on the slot it is in. Switches SW4[2:4] and SW6[2:4] on
	AMC2PEX-2S On B4860QDS, AMC2PEX card decide the PHY addresses on slot1
        and slot2
- Configure MDIO for 10Gig Mac

Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>
---
 board/freescale/b4860qds/eth_b4860qds.c |   35 +++++++++++++++++++++++++++++++
 drivers/net/fm/b4860.c                  |    6 ++++--
 include/configs/B4860QDS.h              |    6 +++++-
 3 files changed, 44 insertions(+), 3 deletions(-)

Patch

diff --git a/board/freescale/b4860qds/eth_b4860qds.c b/board/freescale/b4860qds/eth_b4860qds.c
index 68e2725..3bcda6d 100644
--- a/board/freescale/b4860qds/eth_b4860qds.c
+++ b/board/freescale/b4860qds/eth_b4860qds.c
@@ -275,6 +275,24 @@  int board_eth_init(bd_t *bis)
 		fm_info_set_phy_address(FM1_DTSEC4,
 				CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR);
 		break;
+	case 0x98:
+		/* XAUI in Slot1 and Slot2 */
+		debug("Setting phy addresses on B4860 QDS AMC2PEX-2S for FM1_10GEC1: %x\n",
+		      CONFIG_SYS_FM1_10GEC1_PHY_ADDR);
+		fm_info_set_phy_address(FM1_10GEC1,
+					CONFIG_SYS_FM1_10GEC1_PHY_ADDR);
+		debug("Setting phy addresses on B4860 QDS AMC2PEX-2S for FM1_10GEC2: %x\n",
+		      CONFIG_SYS_FM1_10GEC2_PHY_ADDR);
+		fm_info_set_phy_address(FM1_10GEC2,
+					CONFIG_SYS_FM1_10GEC2_PHY_ADDR);
+		break;
+	case 0x9E:
+		/* XAUI in Slot2 */
+		debug("Setting phy addresses on B4860 QDS AMC2PEX-2S for FM1_10GEC2: %x\n",
+		      CONFIG_SYS_FM1_10GEC2_PHY_ADDR);
+		fm_info_set_phy_address(FM1_10GEC2,
+					CONFIG_SYS_FM1_10GEC2_PHY_ADDR);
+		break;
 	default:
 		printf("Fman:  Unsupported SerDes2 Protocol 0x%02x\n",
 				serdes2_prtcl);
@@ -300,6 +318,23 @@  int board_eth_init(bd_t *bis)
 		}
 	}
 
+	for (i = FM1_10GEC1; i < FM1_10GEC1 + CONFIG_SYS_NUM_FM1_10GEC; i++) {
+		int idx = i - FM1_10GEC1;
+
+		switch (fm_info_get_enet_if(i)) {
+		case PHY_INTERFACE_MODE_XGMII:
+			fm_info_set_mdio(i,
+					 miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME));
+			break;
+		default:
+			printf("Fman1: 10GSEC%u set to unknown interface %i\n",
+			       idx + 1, fm_info_get_enet_if(i));
+			fm_info_set_phy_address(i, 0);
+			break;
+		}
+	}
+
+
 	cpu_eth_init(bis);
 #endif
 
diff --git a/drivers/net/fm/b4860.c b/drivers/net/fm/b4860.c
index 8cde7af..3b5defe 100644
--- a/drivers/net/fm/b4860.c
+++ b/drivers/net/fm/b4860.c
@@ -55,8 +55,10 @@  phy_interface_t fman_port_enet_if(enum fm_port port)
 	if (is_device_disabled(port))
 		return PHY_INTERFACE_MODE_NONE;
 
-	if ((port == FM1_10GEC1 || port == FM1_10GEC2)
-			&& (is_serdes_configured(XAUI_FM1)))
+	/*B4860 has two 10Gig Mac*/
+	if ((port == FM1_10GEC1 || port == FM1_10GEC2)	&&
+	    ((is_serdes_configured(XAUI_FM1_MAC9))	||
+	    (is_serdes_configured(XAUI_FM1_MAC10))))
 		return PHY_INTERFACE_MODE_XGMII;
 
 	/* Fix me need to handle RGMII here first */
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index b09119a..cfab1e8 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -623,7 +623,11 @@  unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_SYS_FM1_DTSEC5_PHY_ADDR	0x10
 #define CONFIG_SYS_FM1_DTSEC6_PHY_ADDR	0x11
-#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR	4
+
+/*B4860 QDS AMC2PEX-2S default PHY_ADDR */
+#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 0x7	 /*SLOT 1*/
+#define CONFIG_SYS_FM1_10GEC2_PHY_ADDR 0x6	 /*SLOT 2*/
+
 
 #define CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR    0x1c
 #define CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR    0x1d