From patchwork Mon Mar 25 17:40:08 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: York Sun X-Patchwork-Id: 230832 X-Patchwork-Delegate: afleming@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 945362C007A for ; Tue, 26 Mar 2013 04:44:28 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2C8024A333; Mon, 25 Mar 2013 18:43:36 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id o5Sz-zyAQ6aJ; Mon, 25 Mar 2013 18:43:35 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 073914A2DD; Mon, 25 Mar 2013 18:42:11 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1E6BD4A2BD for ; Mon, 25 Mar 2013 18:42:04 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id SlHT+jaME3Rb for ; Mon, 25 Mar 2013 18:42:01 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from co1outboundpool.messaging.microsoft.com (co1ehsobe001.messaging.microsoft.com [216.32.180.184]) by theia.denx.de (Postfix) with ESMTPS id 063C84A2D2 for ; Mon, 25 Mar 2013 18:40:46 +0100 (CET) Received: from mail85-co1-R.bigfish.com (10.243.78.227) by CO1EHSOBE010.bigfish.com (10.243.66.73) with Microsoft SMTP Server id 14.1.225.23; Mon, 25 Mar 2013 17:40:44 +0000 Received: from mail85-co1 (localhost [127.0.0.1]) by mail85-co1-R.bigfish.com (Postfix) with ESMTP id ADBB71801FF for ; Mon, 25 Mar 2013 17:40:44 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1f42h1ee6h1de0h1202h1e76h1d1ah1d2ahzz8275bhz2dh2a8h668h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1155h) Received: from mail85-co1 (localhost.localdomain [127.0.0.1]) by mail85-co1 (MessageSwitch) id 1364233242747466_12210; Mon, 25 Mar 2013 17:40:42 +0000 (UTC) Received: from CO1EHSMHS014.bigfish.com (unknown [10.243.78.236]) by mail85-co1.bigfish.com (Postfix) with ESMTP id AEB122E0062 for ; Mon, 25 Mar 2013 17:40:42 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CO1EHSMHS014.bigfish.com (10.243.66.24) with Microsoft SMTP Server (TLS) id 14.1.225.23; Mon, 25 Mar 2013 17:40:41 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server (TLS) id 14.2.328.11; Mon, 25 Mar 2013 17:40:40 +0000 Received: from oslab-l1.am.freescale.net ([10.214.80.134]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id r2PHeQA3012478; Mon, 25 Mar 2013 10:40:39 -0700 From: York Sun To: Date: Mon, 25 Mar 2013 10:40:08 -0700 Message-ID: <1364233225-31262-12-git-send-email-yorksun@freescale.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1364233225-31262-1-git-send-email-yorksun@freescale.com> References: <1364233225-31262-1-git-send-email-yorksun@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: u-boot@lists.denx.de, York Sun , Ed Swarthout Subject: [U-Boot] [Patch v2, batch 4 12/29] powerpc/mpc8xxx: Allow DDR overclock X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Allow DDR clock runs faster than SPD specifes. This may cause memory failure, but the user should know what is going to happen when using higher than expected DDR clock. Signed-off-by: Ed Swarthout Signed-off-by: York Sun --- .../cpu/mpc8xxx/ddr/lc_common_dimm_params.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c index 9adde31..e958e13 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c @@ -44,7 +44,6 @@ compute_cas_latency_ddr3(const dimm_params_t *dimm_params, printf("DDR clock (MCLK cycle %u ps) is faster than " "the slowest DIMM(s) (tCKmin %u ps) can support.\n", mclk_ps, tCKmin_X_ps); - return 1; } /* determine the acutal cas latency */ caslat_actual = (tAAmin_ps + mclk_ps - 1) / mclk_ps; @@ -60,7 +59,6 @@ compute_cas_latency_ddr3(const dimm_params_t *dimm_params, if (caslat_actual * mclk_ps > 20000) { printf("The choosen cas latency %d is too large\n", caslat_actual); - return 1; } outpdimm->lowest_common_SPD_caslat = caslat_actual;