Patchwork [U-Boot,v2,batch,2,01/23] powerpc/B4860: Corrected FMAN1 operating frequency print at u-boot

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Submitter York Sun
Date March 25, 2013, 5:33 p.m.
Message ID <1364232811-30856-1-git-send-email-yorksun@freescale.com>
Download mbox | patch
Permalink /patch/230804/
State Accepted, archived
Delegated to: Andy Fleming
Headers show

Comments

York Sun - March 25, 2013, 5:33 p.m.
From: Sandeep Singh <sandeep@freescale.com>

The bit positions for FMAN1 freq in RCW is different for B4860.
Also addded a case when FMAN1 frewuency is equal to systembus.

Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
---
 arch/powerpc/cpu/mpc85xx/speed.c |    8 ++++++++
 1 file changed, 8 insertions(+)

Patch

diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index 297f2ed..9fc7b54 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -132,10 +132,15 @@  void get_sys_info (sys_info_t * sysInfo)
 		sysInfo->freqProcessor[cpu] =
 			 freqCC_PLL[cplx_pll] / core_cplx_PLL_div[c_pll_sel];
 	}
+#ifdef CONFIG_PPC_B4860
+#define FM1_CLK_SEL	0xe0000000
+#define FM1_CLK_SHIFT	29
+#else
 #define PME_CLK_SEL	0xe0000000
 #define PME_CLK_SHIFT	29
 #define FM1_CLK_SEL	0x1c000000
 #define FM1_CLK_SHIFT	26
+#endif
 	rcw_tmp = in_be32(&gur->rcwsr[7]);
 
 #ifdef CONFIG_SYS_DPAA_PME
@@ -185,6 +190,9 @@  void get_sys_info (sys_info_t * sysInfo)
 	case 4:
 		sysInfo->freqFMan[0] = freqCC_PLL[3] / 4;
 		break;
+	case 5:
+		sysInfo->freqFMan[0] = sysInfo->freqSystemBus;
+		break;
 	case 6:
 		sysInfo->freqFMan[0] = freqCC_PLL[4] / 2;
 		break;