From patchwork Mon Mar 25 17:33:27 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: York Sun X-Patchwork-Id: 230798 X-Patchwork-Delegate: afleming@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 575032C009E for ; Tue, 26 Mar 2013 04:37:35 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3E5D74A03C; Mon, 25 Mar 2013 18:36:39 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 27DURdYBZN8D; Mon, 25 Mar 2013 18:36:39 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9B41E4A176; Mon, 25 Mar 2013 18:34:57 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A96904A0B6 for ; Mon, 25 Mar 2013 18:34:39 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 9fSvi-lFcygp for ; Mon, 25 Mar 2013 18:34:35 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from tx2outboundpool.messaging.microsoft.com (tx2ehsobe001.messaging.microsoft.com [65.55.88.11]) by theia.denx.de (Postfix) with ESMTPS id 6F9C44A111 for ; Mon, 25 Mar 2013 18:34:08 +0100 (CET) Received: from mail16-tx2-R.bigfish.com (10.9.14.234) by TX2EHSOBE011.bigfish.com (10.9.40.31) with Microsoft SMTP Server id 14.1.225.23; Mon, 25 Mar 2013 17:34:06 +0000 Received: from mail16-tx2 (localhost [127.0.0.1]) by mail16-tx2-R.bigfish.com (Postfix) with ESMTP id F217C38009C for ; Mon, 25 Mar 2013 17:34:05 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1f42h1ee6h1de0h1202h1e76h1d1ah1d2ahzz8275bhz2dh2a8h668h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1155h) Received: from mail16-tx2 (localhost.localdomain [127.0.0.1]) by mail16-tx2 (MessageSwitch) id 1364232843995968_18814; Mon, 25 Mar 2013 17:34:03 +0000 (UTC) Received: from TX2EHSMHS028.bigfish.com (unknown [10.9.14.228]) by mail16-tx2.bigfish.com (Postfix) with ESMTP id EEE6280136 for ; Mon, 25 Mar 2013 17:34:03 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by TX2EHSMHS028.bigfish.com (10.9.99.128) with Microsoft SMTP Server (TLS) id 14.1.225.23; Mon, 25 Mar 2013 17:34:02 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-003.039d.mgd.msft.net (10.84.1.16) with Microsoft SMTP Server (TLS) id 14.2.328.11; Mon, 25 Mar 2013 17:34:02 +0000 Received: from oslab-l1.am.freescale.net ([10.214.80.134]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id r2PHXht4018974; Mon, 25 Mar 2013 10:34:01 -0700 From: York Sun To: Date: Mon, 25 Mar 2013 10:33:27 -0700 Message-ID: <1364232811-30856-19-git-send-email-yorksun@freescale.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1364232811-30856-1-git-send-email-yorksun@freescale.com> References: <1364232811-30856-1-git-send-email-yorksun@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: u-boot@lists.denx.de, York Sun Subject: [U-Boot] [Patch v2, batch 2 19/23] powerpc/mpc85xx: Fix PIR parsing for chassis2 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de The PIR parsing algorithm we used is not only for E6500. It applies to all SoCs with chassis 2. Signed-off-by: York Sun --- arch/powerpc/cpu/mpc85xx/release.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/release.S b/arch/powerpc/cpu/mpc85xx/release.S index 0dea871..467ea10 100644 --- a/arch/powerpc/cpu/mpc85xx/release.S +++ b/arch/powerpc/cpu/mpc85xx/release.S @@ -159,9 +159,9 @@ __secondary_start_page: * we cannot access it yet before setting up a new TLB */ mfspr r0,SPRN_PIR -#if defined(CONFIG_E6500) +#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* - * PIR definition for E6500 + * PIR definition for Chassis 2 * 0-17 Reserved (logic 0s) * 8-19 CHIP_ID, 2'b00 - SoC 1 * all others - reserved @@ -187,7 +187,7 @@ __secondary_start_page: slwi r8,r4,6 /* spin table is padded to 64 byte */ add r10,r3,r8 -#ifdef CONFIG_E6500 +#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2 mfspr r0,SPRN_PIR /* * core 0 thread 0: pir reset value 0x00, new pir 0