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[U-Boot,v2,batch,2,07/23] T4/serdes: fix the serdes clock frequency display

Message ID 1364232811-30856-7-git-send-email-yorksun@freescale.com
State Accepted, archived
Delegated to: Andy Fleming
Headers show

Commit Message

York Sun March 25, 2013, 5:33 p.m. UTC 
From: Roy Zang <tie-fei.zang@freescale.com>

Reverse the bit sequence to display serdes clock frequency correctly.
The correct bit maps in BRDCFG2 are
0	1	2	3	4	5	6	7
S1RATE[1:0]	S2RATE[1:0] 	S3RATE[1:0] 	S4RATE[1:0]

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
---
 board/freescale/t4qds/t4qds.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/board/freescale/t4qds/t4qds.c b/board/freescale/t4qds/t4qds.c
index 3c95f3f..e8c6998 100644
--- a/board/freescale/t4qds/t4qds.c
+++ b/board/freescale/t4qds/t4qds.c
@@ -110,7 +110,7 @@  int checkboard(void)
 	for (i = 0; i < MAX_SERDES; i++) {
 		static const char *freq[] = {
 			"100", "125", "156.25", "161.1328125"};
-		unsigned int clock = (sw >> (2 * i)) & 3;
+		unsigned int clock = (sw >> (6 - 2 * i)) & 3;
 
 		printf("SERDES%u=%sMHz ", i+1, freq[clock]);
 	}