From patchwork Mon Mar 25 07:32:07 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Josh Wu X-Patchwork-Id: 230578 X-Patchwork-Delegate: andreas.biessmann@googlemail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 824BE2C00C0 for ; Mon, 25 Mar 2013 18:33:46 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BACDB4A02E; Mon, 25 Mar 2013 08:33:28 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Ofmz-rj9NRjD; Mon, 25 Mar 2013 08:33:28 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 163C64A033; Mon, 25 Mar 2013 08:33:18 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 622214A033 for ; Mon, 25 Mar 2013 08:33:15 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id rgHBIHhztRxv for ; Mon, 25 Mar 2013 08:33:13 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from eusmtp01.atmel.com (eusmtp01.atmel.com [212.144.249.242]) by theia.denx.de (Postfix) with ESMTPS id 5B9014A036 for ; Mon, 25 Mar 2013 08:32:55 +0100 (CET) Received: from apsmtp01.atmel.com (10.168.254.31) by eusmtp01.atmel.com (10.161.101.30) with Microsoft SMTP Server id 14.2.318.4; Mon, 25 Mar 2013 08:32:52 +0100 Received: from shaarm01.corp.atmel.com (10.168.254.13) by apsmtp01.atmel.com (10.168.254.31) with Microsoft SMTP Server id 14.2.318.1; Mon, 25 Mar 2013 15:32:50 +0800 From: Josh Wu To: Date: Mon, 25 Mar 2013 15:32:07 +0800 Message-ID: <1364196729-13868-3-git-send-email-josh.wu@atmel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1364196729-13868-1-git-send-email-josh.wu@atmel.com> References: <1364196729-13868-1-git-send-email-josh.wu@atmel.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 2/4] at91: clock: remove chip macro for plla div2. X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de at91sam9x5, at91sam9n12, at91sam9g45/m10g45 has plla div2 bits. For other at91 arm926ejs chips, this plla div2 bits (bit-12 in mckr) is reserved and default value after reset is 0. So we can handle all the chip in a same way. now we can simply remove the chip select macro. This patch also changes the div2 code to a more readable format. Signed-off-by: Josh Wu --- arch/arm/cpu/arm926ejs/at91/clock.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/at91/clock.c b/arch/arm/cpu/arm926ejs/at91/clock.c index f825388..b6fd2ef 100644 --- a/arch/arm/cpu/arm926ejs/at91/clock.c +++ b/arch/arm/cpu/arm926ejs/at91/clock.c @@ -155,11 +155,12 @@ int at91_clock_init(unsigned long main_clock) * For now, assume this parentage won't change. */ mckr = readl(&pmc->mckr); -#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) \ - || defined(CONFIG_AT91SAM9X5) - /* plla divisor by 2 */ - gd->arch.plla_rate_hz /= (1 << ((mckr & 1 << 12) >> 12)); -#endif + + /* plla divisor by 2, Only for AT91SAM9G45, 9M10G45, 9X5, 9N12 */ + /* For other AT91 chip, the bit 12 of MCKR is reserved, default is 0 */ + if (mckr & (1 << 12)) + gd->arch.plla_rate_hz >>= 1; + gd->arch.mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK); freq = gd->arch.mck_rate_hz;