From patchwork Sun Mar 24 11:27:33 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Clouter X-Patchwork-Id: 230426 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 025DC2C00C2 for ; Sun, 24 Mar 2013 22:31:24 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UJj7N-0008EJ-Dc; Sun, 24 Mar 2013 11:29:41 +0000 Received: from marmot.wormnet.eu ([2a03:9800:10:2d:3203:b3a5:8bdc:5b68]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UJj7I-0008Dj-K9 for linux-mtd@lists.infradead.org; Sun, 24 Mar 2013 11:29:38 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=digriz.org.uk; s=wopr; h=Message-Id:Date:Subject:Cc:To:From; bh=cADHZc3sOsI7Y3tKUugr8GEKtuv0ZgfC0S8ukBogXLI=; b=SNUmoyDs5KPgG5EB/cxvyqnaHDQ0An41klkxetLCvYKLSn/IhhORTKMD0CJxbOrg++dhN+6C/tdMaFKxnNiHSO/Xys3nlLtUPwfFFjZRLZQIJrZshlMNCMn6KH11Nb24MMCSGvptJb0jBABwcl3tUrgSPJ/EkohNbXJqf9uPR5A=; Received: from [2a01:348:45:1000:a539:75d1:c873:2136] (helo=berk.digriz.org.uk) by marmot.wormnet.eu with smtp (Exim 4.80) (envelope-from ) id 1UJj7A-0008LR-La; Sun, 24 Mar 2013 11:29:30 +0000 Received: (nullmailer pid 2776 invoked by uid 1000); Sun, 24 Mar 2013 11:27:38 -0000 From: Alexander Clouter To: David Woodhouse Subject: [PATCH] mtd: plat_nand: add further DT bindings and documentation Date: Sun, 24 Mar 2013 11:27:33 +0000 Message-Id: <1364124453-899-1-git-send-email-alex@digriz.org.uk> X-Mailer: git-send-email 1.7.10.4 X-WormNet-Spam-Score: -1.1 (-) X-WormNet-Spam-Report: from marmot.wormnet.eu -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.8 RDNS_NONE Delivered to internal network by a host with no rDNS Tokens: new, 352; hammy, 77; neutral, 112; spammy, 4. X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130324_072937_025450_14BC67A3 X-CRM114-Status: GOOD ( 20.67 ) X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: linux-mtd@lists.infradead.org, Alexander Clouter X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org The plat_nand driver has some devicetree support but it is currently unusable, especially as there is no documentation on how to use it. This patch adds the much needed documentation as well as adds some common properties (bank-width, chip-delay, bbt-use-flash and nr-chips) removing further use of the platform_nand_data struct. Signed-off-by: Alexander Clouter --- .../devicetree/bindings/mtd/plat-nand.txt | 93 ++++++++++++++++++++ drivers/mtd/nand/plat_nand.c | 53 ++++++++--- 2 files changed, 134 insertions(+), 12 deletions(-) create mode 100644 Documentation/devicetree/bindings/mtd/plat-nand.txt diff --git a/Documentation/devicetree/bindings/mtd/plat-nand.txt b/Documentation/devicetree/bindings/mtd/plat-nand.txt new file mode 100644 index 0000000..d534bfa --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/plat-nand.txt @@ -0,0 +1,93 @@ +NAND support for Generic NAND driver + +Required properties: +- compatible : "gen_nand" +- reg : Array of base physical addresses of the NAND and the length of memory + mapped regions. You *should* have a "nand_data" reg which is the + data io region (if not named, then the first reg is used for + IO_ADDR_R/IO_ADDR_W), additional regs are platform defined +- nr-chips : Number of physical chips + +Optional properties: +- reg-name : "nand_data" *should* be defined, additional ones are platform + defined +- bank-width : Width in bytes of the device. Default is 1 (8bit), 2 (16bit) + implies NAND_BUSWIDTH_16 and any other value is invalid +- chip-delay : Chip dependent delay for transferring data from array to read + registers in usecs +- bbt-use-flash : Use a flash based bad block table. Default, OOB identifier + is saved in OOB area + +The device tree may optionally contain sub-nodes describing partitions of the +address space. See partition.txt for more detail. + +Example: + +nand@800 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "ts,nand", "gen_nand"; + reg = <0x800 0x04>, + <0x804 0x04>; + reg-names = "nand_ctrl", "nand_data"; + nr-chips = <1>; + chip-delay = <15>; + bbt-use-flash; + + partition@0 { + label = "mbr"; + reg = <0x00000000 0x20000>; + read-only; + }; + + partition@20000 { + label = "kernel"; + reg = <0x00020000 0x400000>; + }; + + partition@420000 { + label = "initrd"; + reg = <0x00420000 0x400000>; + }; + + partition@820000 { + label = "rootfs"; + reg = <0x00820000 0x1f7e0000>; + }; +}; + +N.B. to use the plat-nand driver, the platform board code does still need to + setup platform_nand_data and hook it into the platform_device so + the callbacks (for at least .cmd_ctrl and .dev_ready) are available. + +Example: + +static struct platform_nand_data ts7800_nand_data = { + .ctrl = { + .cmd_ctrl = ts7800_nand_cmd_ctrl, + .dev_ready = ts7800_nand_dev_ready, + }, +}; + +static int ts7800_platform_notifier(struct notifier_block *nb, + unsigned long event, void *__dev) +{ + struct device *dev = __dev; + + if (event != BUS_NOTIFY_ADD_DEVICE) + return NOTIFY_DONE; + + if (of_device_is_compatible(dev->of_node, "ts,nand")) + dev->platform_data = &ts7800_nand_data; + + return NOTIFY_OK; +} + +static struct notifier_block ts7800_platform_nb = { + .notifier_call = ts7800_platform_notifier, +}; + +void __init ts7800_init(void) +{ + bus_register_notifier(&platform_bus_type, &ts7800_platform_nb); +} diff --git a/drivers/mtd/nand/plat_nand.c b/drivers/mtd/nand/plat_nand.c index c004566..1407db5 100644 --- a/drivers/mtd/nand/plat_nand.c +++ b/drivers/mtd/nand/plat_nand.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -23,7 +24,7 @@ struct plat_nand_data { void __iomem *io_base; }; -static const char *part_probe_types[] = { "cmdlinepart", NULL }; +static const char *part_probe_types[] = { "cmdlinepart", "ofpart", NULL }; /* * Probe for the NAND device. @@ -42,14 +43,11 @@ static int plat_nand_probe(struct platform_device *pdev) return -EINVAL; } - if (pdata->chip.nr_chips < 1) { - dev_err(&pdev->dev, "invalid number of chips specified\n"); - return -EINVAL; - } - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nand_data"); if (!res) - return -ENXIO; + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -ENXIO; /* Allocate memory for the device structure (and zero it) */ data = kzalloc(sizeof(struct plat_nand_data), GFP_KERNEL); @@ -79,15 +77,40 @@ static int plat_nand_probe(struct platform_device *pdev) data->chip.IO_ADDR_R = data->io_base; data->chip.IO_ADDR_W = data->io_base; + + if (pdev->dev.of_node) { + int i; + + if (!of_property_read_u32(pdev->dev.of_node, + "nr-chips", &i)) + data->chip.numchips = i; + if (!of_property_read_u32(pdev->dev.of_node, + "chip-delay", &i)) + data->chip.chip_delay = (u8)i; + if (!of_property_read_u32(pdev->dev.of_node, + "bank-width", &i)) { + if (i == 2) + data->chip.options |= NAND_BUSWIDTH_16; + else if (i != 1) { + dev_warn(&pdev->dev, + "%d bit bus width out of range\n", i); + } + } + if (of_get_property(pdev->dev.of_node, "bbt-use-flash", &i)) + data->chip.bbt_options |= NAND_BBT_USE_FLASH; + } else { + data->chip.numchips = pdata->chip.nr_chips; + data->chip.chip_delay = pdata->chip.chip_delay; + data->chip.options |= pdata->chip.options; + data->chip.bbt_options |= pdata->chip.bbt_options; + } + data->chip.cmd_ctrl = pdata->ctrl.cmd_ctrl; data->chip.dev_ready = pdata->ctrl.dev_ready; data->chip.select_chip = pdata->ctrl.select_chip; data->chip.write_buf = pdata->ctrl.write_buf; data->chip.read_buf = pdata->ctrl.read_buf; data->chip.read_byte = pdata->ctrl.read_byte; - data->chip.chip_delay = pdata->chip.chip_delay; - data->chip.options |= pdata->chip.options; - data->chip.bbt_options |= pdata->chip.bbt_options; data->chip.ecc.hwctl = pdata->ctrl.hwcontrol; data->chip.ecc.layout = pdata->chip.ecclayout; @@ -102,8 +125,14 @@ static int plat_nand_probe(struct platform_device *pdev) goto out; } + if (data->chip.numchips < 1) { + dev_err(&pdev->dev, "invalid number of chips specified\n"); + err = -EINVAL; + goto out; + } + /* Scan to find existence of the device */ - if (nand_scan(&data->mtd, pdata->chip.nr_chips)) { + if (nand_scan(&data->mtd, data->chip.numchips)) { err = -ENXIO; goto out; }