Patchwork [U-Boot,3/3,V4] EXYNOS5: GPIO: Enable GPIO Command for EXYNOS5

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Submitter Rajeshwari Birje
Date March 21, 2013, 11:33 a.m.
Message ID <1363865621-7570-4-git-send-email-rajeshwari.s@samsung.com>
Download mbox | patch
Permalink /patch/229630/
State Changes Requested
Delegated to: Minkyu Kang
Headers show

Comments

Rajeshwari Birje - March 21, 2013, 11:33 a.m.
This patch enables GPIO Command for EXYNOS5.
Function has been added to asm/gpio.h to decode the
input gpio name to gpio number.
example: gpio set gpa00

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
---
Changes in V2:
        - New patch
Changes in V3:
	- Created a table to know the base address of input bank.
Changes in V4:
	- Moved the function name_to_gpio to s5p gpio driver and 
	renamed to s5p_name_to_gpio.
 arch/arm/include/asm/arch-exynos/gpio.h |    8 +++++
 drivers/gpio/s5p_gpio.c                 |   49 +++++++++++++++++++++++++++++++
 include/configs/exynos5250-dt.h         |    1 +
 3 files changed, 58 insertions(+), 0 deletions(-)

Patch

diff --git a/arch/arm/include/asm/arch-exynos/gpio.h b/arch/arm/include/asm/arch-exynos/gpio.h
index 0b8e35e..7c0df0b 100644
--- a/arch/arm/include/asm/arch-exynos/gpio.h
+++ b/arch/arm/include/asm/arch-exynos/gpio.h
@@ -668,6 +668,14 @@  static inline unsigned int s5p_gpio_part_max(int nr)
 	return 0;
 }
 
+struct gpio_name_num_table {
+	char bank;
+	unsigned int base;
+};
+
+int s5p_name_to_gpio(const char *name);
+#define name_to_gpio(n) s5p_name_to_gpio(n)
+
 void gpio_cfg_pin(int gpio, int cfg);
 void gpio_set_pull(int gpio, int mode);
 void gpio_set_drv(int gpio, int mode);
diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c
index a503137..312d352 100644
--- a/drivers/gpio/s5p_gpio.c
+++ b/drivers/gpio/s5p_gpio.c
@@ -57,6 +57,21 @@  static const struct gpio_info gpio_data[EXYNOS5_GPIO_NUM_PARTS] = {
 #define HAVE_GENERIC_GPIO
 #endif
 
+struct gpio_name_num_table exynos5_gpio_table[] = {
+	{ 'a', EXYNOS5_GPIO_A00 },
+	{ 'b', EXYNOS5_GPIO_B00 },
+	{ 'c', EXYNOS5_GPIO_C00 },
+	{ 'd', EXYNOS5_GPIO_D00 },
+	{ 'y', EXYNOS5_GPIO_Y00 },
+	{ 'x', EXYNOS5_GPIO_X00 },
+	{ 'e', EXYNOS5_GPIO_E00 },
+	{ 'f', EXYNOS5_GPIO_F00 },
+	{ 'g', EXYNOS5_GPIO_G00 },
+	{ 'h', EXYNOS5_GPIO_H00 },
+	{ 'v', EXYNOS5_GPIO_V00 },
+	{ 'z', EXYNOS5_GPIO_Z0 },
+};
+
 void s5p_gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg)
 {
 	unsigned int value;
@@ -259,3 +274,37 @@  void gpio_cfg_pin(int gpio, int cfg)
 	s5p_gpio_cfg_pin(s5p_gpio_get_bank(gpio),
 			s5p_gpio_get_pin(gpio), cfg);
 }
+
+int s5p_name_to_gpio(const char *name)
+{
+	unsigned int num, i;
+
+	name++;
+
+	if (*name == 'p')
+		++name;
+
+	for (i = 0; i < ARRAY_SIZE(exynos5_gpio_table); i++) {
+		if (*name == exynos5_gpio_table[i].bank) {
+			if (*name == 'c') {
+				name++;
+				num = simple_strtoul(name, NULL, 10);
+				if (num >= 40) {
+					num = EXYNOS5_GPIO_C40 + (num - 40);
+				} else {
+					num = simple_strtoul(name, NULL, 8);
+					num = exynos5_gpio_table[i].base + num;
+				}
+			} else {
+				name++;
+				num = simple_strtoul(name, NULL, 8);
+				num = exynos5_gpio_table[i].base + num;
+			}
+			break;
+		}
+	}
+
+	if (i == ARRAY_SIZE(exynos5_gpio_table))
+		return -1;
+	return num;
+}
diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index 9fab0fb..5a8a2fb 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -115,6 +115,7 @@ 
 #define CONFIG_CMD_EXT2
 #define CONFIG_CMD_FAT
 #define CONFIG_CMD_NET
+#define CONFIG_CMD_GPIO
 
 #define CONFIG_BOOTDELAY		3
 #define CONFIG_ZERO_BOOTDELAY_CHECK