Patchwork powerpc/dts: Add qe support for 36bit

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Submitter Zhicheng Fan
Date March 21, 2013, 9:26 a.m.
Message ID <1363857961-23296-1-git-send-email-B32736@freescale.com>
Download mbox | patch
Permalink /patch/229616/
State Superseded
Delegated to: Kumar Gala
Headers show

Comments

Zhicheng Fan - March 21, 2013, 9:26 a.m.
fixed the following errors:
	Error: arch/powerpc/boot/dts/p1025rdb.dtsi:326.2-3 label or path, 'qe', not found
	Error: arch/powerpc/boot/dts/fsl/p1021si-post.dtsi:242.2-3 label or path, 'qe', not found
	FATAL ERROR: Syntax error parsing input tree

Signed-off-by: Zhicheng Fan <B32736@freescale.com>
---
 arch/powerpc/boot/dts/p1025rdb_36b.dts |   48 ++++++++++++++++++++++++++++++++
 1 files changed, 48 insertions(+), 0 deletions(-)
Timur Tabi - March 21, 2013, 6:42 p.m.
On Thu, Mar 21, 2013 at 4:26 AM, Zhicheng Fan <B32736@freescale.com> wrote:
> +       qe: qe@fffe80000 {
> +               ranges = <0x0 0xf 0xffe80000 0x40000>;

Are you sure this works?  The QE can't handle 36-bit addresses, and I
think the MURAM is located inside the QE address space.
Zhicheng Fan - March 22, 2013, 7:16 a.m.
On 03/22/2013 02:42 AM, Timur Tabi wrote:
> On Thu, Mar 21, 2013 at 4:26 AM, Zhicheng Fan <B32736@freescale.com> wrote:
>> +       qe: qe@fffe80000 {
>> +               ranges = <0x0 0xf 0xffe80000 0x40000>;
> Are you sure this works?  The QE can't handle 36-bit addresses, and I
> think the MURAM is located inside the QE address space.
>
Hi Timur,
         you are right ,the QE can not support the 36-bit , I test it on 
the p1025 ,the qe can not work
         but we need the qe node , becase the dts include the 
fsl/p1021si-post.dtsi
         that needed, I will send other patch
Timur Tabi - March 22, 2013, 11:50 a.m.
Zhicheng Fan wrote:
>>
> Hi Timur,
>          you are right ,the QE can not support the 36-bit , I test it on
> the p1025 ,the qe can not work
>          but we need the qe node , becase the dts include the
> fsl/p1021si-post.dtsi
>          that needed, I will send other patch

My suggestion: with a 36-bit device tree, the QE must be disabled.

	qe: qe@fffe80000 {
		/* The QE does not work with 36-bit addressing */
		status = "disabled";
	};

However, on the P102x, there may be a GUTS register that stores the upper 
four bits of the QE's physical address.  Your patch *can* work if you 
*also* set this register to 0xF.  Look for that register.

Patch

diff --git a/arch/powerpc/boot/dts/p1025rdb_36b.dts b/arch/powerpc/boot/dts/p1025rdb_36b.dts
index 4ce4bfa..c74c39b 100644
--- a/arch/powerpc/boot/dts/p1025rdb_36b.dts
+++ b/arch/powerpc/boot/dts/p1025rdb_36b.dts
@@ -82,6 +82,54 @@ 
 				  0x0 0x100000>;
 		};
 	};
+
+	qe: qe@fffe80000 {
+		ranges = <0x0 0xf 0xffe80000 0x40000>;
+		reg = <0xf 0xffe80000 0 0x480>;
+		brg-frequency = <0>;
+		bus-frequency = <0>;
+		status = "disabled"; /* no firmware loaded */
+
+		enet3: ucc@2000 {
+			device_type = "network";
+			compatible = "ucc_geth";
+			rx-clock-name = "clk12";
+			tx-clock-name = "clk9";
+			pio-handle = <&pio1>;
+			phy-handle = <&qe_phy0>;
+			phy-connection-type = "mii";
+		};
+
+		mdio@2120 {
+			qe_phy0: ethernet-phy@0 {
+				interrupt-parent = <&mpic>;
+				interrupts = <4 1 0 0>;
+				reg = <0x6>;
+				device_type = "ethernet-phy";
+			};
+			qe_phy1: ethernet-phy@03 {
+				interrupt-parent = <&mpic>;
+				interrupts = <5 1 0 0>;
+				reg = <0x3>;
+				device_type = "ethernet-phy";
+			};
+			tbi-phy@11 {
+				reg = <0x11>;
+				device_type = "tbi-phy";
+			};
+		};
+
+		enet4: ucc@2400 {
+			device_type = "network";
+			compatible = "ucc_geth";
+			rx-clock-name = "none";
+			tx-clock-name = "clk13";
+			pio-handle = <&pio2>;
+			phy-handle = <&qe_phy1>;
+			phy-connection-type = "rmii";
+		};
+	};
+
 };
 
 /include/ "p1025rdb.dtsi"