Patchwork [committed] TILE-Gx: add atomic test and set pattern

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Submitter Walter Lee
Date March 21, 2013, 2:55 a.m.
Message ID <201303210255.r2L2ts8A018821@farm-0001.internal.tilera.com>
Download mbox | patch
Permalink /patch/229539/
State New
Headers show

Comments

Walter Lee - March 21, 2013, 2:55 a.m.
This patch adds an atomic test and set pattern on tilegx.  Without
this pattern, libatomic currently fails to build on tilegx.  Do I need
permission to backport this to the 4.8 branch?

Thanks,

Walter

       * config/tilegx/sync.md (atomic_test_and_set): New pattern.

Patch

Index: gcc/config/tilegx/sync.md
===================================================================
--- gcc/config/tilegx/sync.md   (revision 196804)
+++ gcc/config/tilegx/sync.md   (working copy)
@@ -162,3 +162,49 @@ 
   tilegx_post_atomic_barrier (model);
   DONE;
 })
+
+
+(define_expand "atomic_test_and_set"
+  [(match_operand:QI 0 "register_operand" "")           ;; bool output
+   (match_operand:QI 1 "nonautoincmem_operand" "+U")    ;; memory
+   (match_operand:SI 2 "const_int_operand" "")]         ;; model
+  ""
+{
+  rtx addr, aligned_addr, aligned_mem, offset, word, shmt;
+  rtx tmp0, tmp1;
+  rtx result = operands[0];
+  rtx mem = operands[1];
+  enum memmodel model = (enum memmodel) INTVAL (operands[2]);
+
+  addr = force_reg (Pmode, XEXP (mem, 0));
+
+  aligned_addr = gen_reg_rtx (Pmode);
+  emit_move_insn (aligned_addr, gen_rtx_AND (Pmode, addr, GEN_INT (-8)));
+
+  aligned_mem = change_address (mem, DImode, aligned_addr);
+  set_mem_alias_set (aligned_mem, 0);
+
+  offset = gen_reg_rtx (DImode);
+  emit_move_insn (offset, gen_rtx_AND (DImode, gen_lowpart (DImode, addr),
+                                       GEN_INT (7)));
+
+  tmp0 = gen_reg_rtx (DImode);
+  emit_move_insn (tmp0, GEN_INT (1));
+
+  shmt = gen_reg_rtx (DImode);
+  emit_move_insn (shmt, gen_rtx_ASHIFT (DImode, offset, GEN_INT (3)));
+
+  word = gen_reg_rtx (DImode);
+  emit_move_insn (word, gen_rtx_ASHIFT (DImode, tmp0,
+                                        gen_lowpart (SImode, shmt)));
+
+  tmp1 = gen_reg_rtx (DImode);
+  tilegx_pre_atomic_barrier (model);
+  emit_insn (gen_atomic_fetch_or_baredi (tmp1, aligned_mem, word));
+  tilegx_post_atomic_barrier (model);
+
+  emit_move_insn (gen_lowpart (DImode, result),
+                  gen_rtx_LSHIFTRT (DImode, tmp1,
+                                    gen_lowpart (SImode, shmt)));
+  DONE;
+})