Patchwork [U-Boot,v2] mxs: spl_mem_init: Align DDR2 init with FSL bootlets source

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Submitter Lauri Hintsala
Date March 19, 2013, 11:43 a.m.
Message ID <51484F47.4070108@bluegiga.com>
Download mbox | patch
Permalink /patch/229015/
State Not Applicable
Delegated to: Stefano Babic
Headers show

Comments

Lauri Hintsala - March 19, 2013, 11:43 a.m.
On 03/19/2013 01:35 PM, Otavio Salvador wrote:
> On Tue, Mar 19, 2013 at 3:52 AM, Lauri Hintsala
> <lauri.hintsala@bluegiga.com> wrote:
>> Hi,
>>
>>
>> On 03/01/2013 12:59 AM, Fabio Estevam wrote:
>>>
>>> From: Fabio Estevam <fabio.estevam@freescale.com>
>>>
>>> Currently the following kernel hang happens when loading a 2.6.35 kernel
>>> from
>>> Freeescale on a mx28evk board:
>>>
>>> RPC: Registered tcp transport module.
>>> RPC: Registered tcp NFSv4.1 backchannel transport module.
>>> Bus freq driver module loaded
>>> IMX usb wakeup probe
>>> usb h1 wakeup device is registered
>>> mxs_cpu_init: cpufreq init finished
>>> ...
>>
>>
>> I tried to boot Freescale's 2.6.35.3 kernel on apx4devkit. The device is
>> still freezing after mxs_cpu_init print.
>>
>>
>> Full logs:
>>
>> U-Boot 2013.04-rc1-00002-g9659479 (Mar 19 2013 - 08:30:05)
>>
>> CPU:   Freescale i.MX28 rev1.2 at 454 MHz
>> BOOT:  SSP SD/MMC #0, 3V3
>> I2C:   ready
>> DRAM:  64 MiB
>> NAND:  128 MiB
>> MMC:   MXS MMC: 0
>> In:    serial
>> Out:   serial
>> Err:   serial
>> Net:   FEC
>> Hit any key to stop autoboot:  0
>>
>> 1944456 bytes read in 754 ms (2.5 MiB/s)
>> ## Booting kernel from Legacy Image at 41000000 ...
>>     Image Name:   Linux-2.6.35.3-01010-ge53a812
>>     Created:      2013-03-19   6:31:40 UTC
>>     Image Type:   ARM Linux Kernel Image (uncompressed)
>>     Data Size:    1944392 Bytes = 1.9 MiB
>>     Load Address: 40008000
>>     Entry Point:  40008000
>>     Loading Kernel Image ... OK
>> OK
>>
>> Starting kernel ...
>>
>> Uncompressing Linux... done, booting the kernel.
>> Linux version 2.6.35.3-01010-ge53a812 (hintsla@bgtlh) (gcc version 4.3.4
>> (crosstool-NG-1.7.0) ) #32 Tue Mar 19 08:31:39 EET 2013
>> CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177
>> CPU: VIVT data cache, VIVT instruction cache
>> Machine: Freescale MX28EVK board
>> Memory policy: ECC disabled, Data cache writeback
>> Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 16256
>> Kernel command line: console=tty0 console=ttyAMA0,115200 consoleblank=0
>> ethaddr=00:07:80:01:66:db btaddr=00:07:80:01:67:0d
>> wlanaddr=00:07:80:59:ef:64 root=/dev/mmcblk0p2 rootwait
>> mtdparts=gpmi-nand:128k(bootstrap),1024k(boot),768k(env),-(root) rw
>> PID hash table entries: 256 (order: -2, 1024 bytes)
>> Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
>> Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
>> Memory: 64MB = 64MB total
>> Memory: 60880k/60880k available, 4656k reserved, 0K highmem
>> Virtual kernel memory layout:
>>      vector  : 0xffff0000 - 0xffff1000   (   4 kB)
>>      fixmap  : 0xfff00000 - 0xfffe0000   ( 896 kB)
>>      DMA     : 0xfde00000 - 0xffe00000   (  32 MB)
>>      vmalloc : 0xc4800000 - 0xf0000000   ( 696 MB)
>>      lowmem  : 0xc0000000 - 0xc4000000   (  64 MB)
>>      modules : 0xbf000000 - 0xc0000000   (  16 MB)
>>        .init : 0xc0008000 - 0xc002d000   ( 148 kB)
>>        .text : 0xc002d000 - 0xc03b8000   (3628 kB)
>>        .data : 0xc03b8000 - 0xc03e4ba0   ( 179 kB)
>> SLUB: Genslabs=11, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
>> Hierarchical RCU implementation.
>>          RCU-based detection of stalled CPUs is disabled.
>>          Verbose stalled-CPUs detection is disabled.
>> NR_IRQS:288
>> Console: colour dummy device 80x30
>> console [tty0] enabled
>> console [ttyAMA0] enabled
>> Calibrating delay loop... 226.09 BogoMIPS (lpj=1130496)
>> pid_max: default: 32768 minimum: 301
>> Mount-cache hash table entries: 512
>> CPU: Testing write buffer coherency: ok
>> regulator: core version 0.5
>> NET: Registered protocol family 16
>> regulator: vddd: 800 <--> 1575 mV at 1500 mV fast normal
>> regulator: vdddbo: 800 <--> 1575 mV fast normal
>> regulator: vdda: 1500 <--> 2275 mV at 1800 mV fast normal
>> vddio = 3380000, val=10
>> regulator: vddio: 2880 <--> 3680 mV at 3380 mV fast normal
>> regulator: overall_current: fast normal
>> regulator: vbus5v:
>> regulator: mxs-duart-1: fast normal
>> regulator: mxs-bl-1: fast normal
>> regulator: mxs-i2c-1: fast normal
>> regulator: mmc_ssp-1: fast normal
>> regulator: mmc_ssp-2: fast normal
>> regulator: charger-1: fast normal
>> regulator: power-test-1: fast normal
>> regulator: cpufreq-1: fast normal
>> i.MX IRAM pool: 124 KB@0xc4820000
>> Initializing GPMI pins
>> Initializing SSP2 pins
>> bio: create slab <bio-0> at 0
>> SCSI subsystem initialized
>> usbcore: registered new interface driver usbfs
>> usbcore: registered new interface driver hub
>> usbcore: registered new device driver usb
>> Advanced Linux Sound Architecture Driver Version 1.0.23.
>> IMX usb wakeup probe
>> usb DR wakeup device is registered
>> Switching to clocksource mxs clock source
>> NET: Registered protocol family 2
>> IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
>> Switched to NOHz mode on CPU #0
>> TCP established hash table entries: 2048 (order: 2, 16384 bytes)
>> TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
>> TCP: Hash tables configured (established 2048 bind 2048)
>> TCP reno registered
>> UDP hash table entries: 256 (order: 0, 4096 bytes)
>> UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
>> NET: Registered protocol family 1
>> RPC: Registered udp transport module.
>>
>> RPC: Registered tcp transport module.
>> RPC: Registered tcp NFSv4.1 backchannel transport module.
>> Bus freq driver module loaded
>> IMX usb wakeup probe
>> usb h1 wakeup device is registered
>> WARNING : No battery connected !
>> Aborting power driver initialization
>> mxs-battery: probe of mxs-battery.0 failed with error 1
>> mxs_cpu_init: cpufreq init finished
>>
>>
>> And after that line the device is completely dead.
>
> Are you sure you booted it with the Fabio's patch applied; this is
> exactly how it behaves *without* it.


Yes, I am. I booted up U-Boot version "2013.04-rc1-00002-g9659479 (Mar 
19 2013 - 08:30:05)" and my git log says:

$ git log --oneline -3
9659479 (HEAD) mxs: spl_mem_init: Align DDR2 init with FSL bootlets source
7ddcf4c ARM: mxs: disable battery charger circuit
2536850 (tag: v2013.04-rc1) Prepare v2013.04-rc1


Battery charger patch is very simple and it shouldn't affect to this 
problem any way:



Lauri
Fabio Estevam - March 23, 2013, 4:56 p.m.
Hi Lauri,

On Tue, Mar 19, 2013 at 8:43 AM, Lauri Hintsala
<lauri.hintsala@bluegiga.com> wrote:

> Battery charger patch is very simple and it shouldn't affect to this problem
> any way:
>
> --- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
> +++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
> @@ -918,6 +918,9 @@ void mxs_power_init(void)
>
>         writel(POWER_5VCTRL_PWDN_5VBRNOUT,
> &power_regs->hw_power_5vctrl_set);
>
> +       /* Disable battery charger circuit */
> +       power_regs->hw_power_charge_set = POWER_CHARGE_PWD_BATTCHRG;
> +
>         early_delay(1000);

What about this change? Do you plan to submit this as a patch?

Patch

--- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
@@ -918,6 +918,9 @@  void mxs_power_init(void)

         writel(POWER_5VCTRL_PWDN_5VBRNOUT, 
&power_regs->hw_power_5vctrl_set);

+       /* Disable battery charger circuit */
+       power_regs->hw_power_charge_set = POWER_CHARGE_PWD_BATTCHRG;
+
         early_delay(1000);
  }