From patchwork Mon Mar 18 17:51:04 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 228904 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "localhost", Issuer "www.qmailtoaster.com" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 5FD152C0099 for ; Tue, 19 Mar 2013 12:50:30 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:reply-to:mime-version :content-type; q=dns; s=dkim1; b=e6lYwcihSc1pYkni5g7wkdsm1bFMBl5 ZQKdzaIK8FrZ5h8cxBZ1ER5nnV4a+AjcmpS+Q8I9jjs8LzWxLFP9ffZBii4Y1Hl+ xeLCr6l54JEZK2cOrjm/sQYpyWrtet8Yu07ia0CFiXb+lz/zWmLl81pm9+OxtUMB IMlya0HQOL7Y= DKIM-Signature: v=1; a=rsa-sha1; c=simple; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:reply-to:mime-version :content-type; s=dkim1; bh=31S8KoEQo2qZ+zpsAPfpj0R/An8=; b=Ry2TD kEHRI6mawXfvjTKiPdHlT5Oq957H3ieT+m0jfzn6dB0mNCwrnvCJFCsO4w3tNCuB hU6p5V2rougIl3HU9aSjvrUcyb0J7ADb7bsJ4+s8diutOQ7jLCCuhFfQJ+80n+Lh oZxmBqmaS7ZIRkFcHYeoXoTTeJjKVAEd14mH2Q= Received: (qmail 2452 invoked by alias); 19 Mar 2013 01:19:18 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 751 invoked by uid 89); 19 Mar 2013 01:17:58 -0000 Received: from mga01.intel.com (HELO mga01.intel.com) (192.55.52.88) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 19 Mar 2013 01:17:58 +0000 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP; 18 Mar 2013 10:51:05 -0700 X-ExtLoop1: 1 Received: from gnu-6.sc.intel.com ([10.3.194.135]) by fmsmga001.fm.intel.com with ESMTP; 18 Mar 2013 10:51:05 -0700 Received: by gnu-6.sc.intel.com (Postfix, from userid 500) id EA4BE809CD; Mon, 18 Mar 2013 10:51:04 -0700 (PDT) Date: Mon, 18 Mar 2013 10:51:04 -0700 From: "H.J. Lu" To: gcc-patches@gcc.gnu.org Cc: Uros Bizjak Subject: PATCH: PR target/56560: [4.6/4.7 regression] vzeroupper clobbers argument with AVX Message-ID: <20130318175104.GA7106@intel.com> Reply-To: "H.J. Lu" MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) Hi, ix86_function_arg sets cfun->machine->callee_pass_avx256_p from the current argument. It clears callee_pass_avx256_p when ix86_function_arg is called to generate a library call to passs an argument. This patch adds callee_pass_avx256_p and callee_return_avx256_p to ix86_args to store the AVX info in CUM and copy it to cfun->machine->callee_pass_avx256_p when ix86_function_arg is called immediately before the call instruction is emitted. OK for 4.7 branch? Thanks. H.J. --- gcc/ 2013-03-18 H.J. Lu PR target/56560 * config/i386/i386.c (init_cumulative_args): Also set cum->callee_return_avx256_p. (ix86_function_arg): Set cum->callee_pass_avx256_p. Set cfun->machine->callee_pass_avx256_p only when MODE == VOIDmode. * config/i386/i386.h (ix86_args): Add callee_pass_avx256_p and callee_return_avx256_p. gcc/ 2013-03-18 H.J. Lu PR target/56560 * gcc.target/i386/pr56560.c: New file. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index c1f6c88..7a441c7 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -5592,7 +5592,10 @@ init_cumulative_args (CUMULATIVE_ARGS *cum, /* Argument info to initialize */ { /* The return value of this function uses 256bit AVX modes. */ if (caller) - cfun->machine->callee_return_avx256_p = true; + { + cfun->machine->callee_return_avx256_p = true; + cum->callee_return_avx256_p = true; + } else cfun->machine->caller_return_avx256_p = true; } @@ -6863,11 +6866,20 @@ ix86_function_arg (cumulative_args_t cum_v, enum machine_mode omode, { /* This argument uses 256bit AVX modes. */ if (cum->caller) - cfun->machine->callee_pass_avx256_p = true; + cum->callee_pass_avx256_p = true; else cfun->machine->caller_pass_avx256_p = true; } + if (cum->caller && mode == VOIDmode) + { + /* This function is called with MODE == VOIDmode immediately + before the call instruction is emitted. We copy callee 256bit + AVX info from the current CUM here. */ + cfun->machine->callee_return_avx256_p = cum->callee_return_avx256_p; + cfun->machine->callee_pass_avx256_p = cum->callee_pass_avx256_p; + } + return arg; } diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 80d19f1..899678d 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -1502,6 +1502,10 @@ typedef struct ix86_args { in SSE registers. Otherwise 0. */ enum calling_abi call_abi; /* Set to SYSV_ABI for sysv abi. Otherwise MS_ABI for ms abi. */ + /* Nonzero if it passes 256bit AVX modes. */ + BOOL_BITFIELD callee_pass_avx256_p : 1; + /* Nonzero if it returns 256bit AVX modes. */ + BOOL_BITFIELD callee_return_avx256_p : 1; } CUMULATIVE_ARGS; /* Initialize a variable CUM of type CUMULATIVE_ARGS diff --git a/gcc/testsuite/gcc.target/i386/pr56560.c b/gcc/testsuite/gcc.target/i386/pr56560.c new file mode 100644 index 0000000..5417cbd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr56560.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx -mvzeroupper -dp" } */ + +extern void abort (void); + +typedef double vec_t __attribute__((vector_size(32))); + +struct S { int i1; int i2; int i3; }; + +extern int bar (vec_t, int, int, int, int, int, struct S); + +void foo (vec_t v, struct S s) +{ + int i = bar (v, 1, 2, 3, 4, 5, s); + if (i == 0) + abort (); +} + +/* { dg-final { scan-assembler-not "avx_vzeroupper" } } */