From patchwork Mon Mar 18 11:18:44 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Shijie X-Patchwork-Id: 228470 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 0835B2C00DE for ; Mon, 18 Mar 2013 23:28:06 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UHZ9I-0006Fl-St; Mon, 18 Mar 2013 12:26:44 +0000 Received: from co1ehsobe002.messaging.microsoft.com ([216.32.180.185] helo=co1outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UHY97-0008O0-C4 for linux-mtd@lists.infradead.org; Mon, 18 Mar 2013 11:22:31 +0000 Received: from mail196-co1-R.bigfish.com (10.243.78.243) by CO1EHSOBE003.bigfish.com (10.243.66.66) with Microsoft SMTP Server id 14.1.225.23; Mon, 18 Mar 2013 11:22:20 +0000 Received: from mail196-co1 (localhost [127.0.0.1]) by mail196-co1-R.bigfish.com (Postfix) with ESMTP id 3364138015B; Mon, 18 Mar 2013 11:22:20 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 6 X-BigFish: VS6(z3121kzzz1f42h1ee6h1de0h1202h1e76h1d1ah1d2ah1082kzz8275bhz2dh2a8h668h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1155h) Received: from mail196-co1 (localhost.localdomain [127.0.0.1]) by mail196-co1 (MessageSwitch) id 1363605738673211_11257; Mon, 18 Mar 2013 11:22:18 +0000 (UTC) Received: from CO1EHSMHS010.bigfish.com (unknown [10.243.78.229]) by mail196-co1.bigfish.com (Postfix) with ESMTP id 97BD0100097; Mon, 18 Mar 2013 11:22:18 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CO1EHSMHS010.bigfish.com (10.243.66.20) with Microsoft SMTP Server (TLS) id 14.1.225.23; Mon, 18 Mar 2013 11:22:18 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-004.039d.mgd.msft.net (10.84.1.14) with Microsoft SMTP Server (TLS) id 14.2.328.11; Mon, 18 Mar 2013 11:22:17 +0000 Received: from shlinux2.ap.freescale.net (shlinux2.ap.freescale.net [10.192.224.44]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id r2IBM636021313; Mon, 18 Mar 2013 04:22:15 -0700 From: Huang Shijie To: Subject: [PATCH 01/11] mtd: add datasheet's ECC information to nand_chip{} Date: Mon, 18 Mar 2013 19:18:44 +0800 Message-ID: <1363605534-24776-2-git-send-email-b32955@freescale.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1363605534-24776-1-git-send-email-b32955@freescale.com> References: <1363605534-24776-1-git-send-email-b32955@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130318_072229_616927_129421AD X-CRM114-Status: GOOD ( 14.35 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [216.32.180.185 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Huang Shijie , computersforpeace@gmail.com, linux-mtd@lists.infradead.org, matthieu.castet@parrot.com, dedekind1@gmail.com X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org 1.) Why add the ECC information to the nand_chip{} ? Each nand chip has its requirement for the ECC correctability, such as "4bit ECC for each 512Byte" or "40bit ECC for each 1024Byte". This ECC info is very important to the nand controller, such as gpmi. Take the Micron MT29F64G08CBABA for example, its geometry is 8k page size, 744 bytes oob size and it requires 40bit ECC per 1K bytes. If we do not provide the ECC info to the gpmi nand driver, it has to calculate the ECC correctability itself. The gpmi driver will gets the 56bit ECC for per 1K bytes which is beyond its BCH's 40bit ecc capibility. The gpmi will quits in this case. But in actually, the gpmi can supports this nand chip if it can get the right ECC info. 2.) about the new fields. The @ecc_strength stands for the ecc bits needed within the @ecc_size. Both of the new fields should be set which conform to the datasheet. For example: "4bit ECC for each 512Byte" could be: @ecc_strength = 4, @ecc_size = 512. "40bit ECC for each 1024Byte" could be: @ecc_strength = 40, @ecc_size = 1024. 3.) Why do not re-use the @strength and @size in the nand_ecc_ctrl{}? The @strength and @size in nand_ecc_ctrl{} is used by the nand controller driver, while the @ecc_strength and @ecc_size are get from the datasheet. Signed-off-by: Huang Shijie --- include/linux/mtd/nand.h | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 4b87815..65b0e8b 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -425,6 +425,9 @@ struct nand_buffers { * bad block marker position; i.e., BBM == 11110111b is * not bad when badblockbits == 7 * @cellinfo: [INTERN] MLC/multichip data from chip ident + * @ecc_strength: [INTERN] ECC correctability from the datasheet. + * @ecc_size: [INTERN] ECC size required by the @ecc_strength, + * also from the datasheet. * @numchips: [INTERN] number of physical chips * @chipsize: [INTERN] the size of one chip for multichip arrays * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1 @@ -502,6 +505,8 @@ struct nand_chip { unsigned int pagebuf_bitflips; int subpagesize; uint8_t cellinfo; + uint16_t ecc_strength; + uint16_t ecc_size; int badblockpos; int badblockbits;