From patchwork Fri Mar 15 16:56:32 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 228127 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 9214B2C0079 for ; Sat, 16 Mar 2013 04:57:36 +1100 (EST) Received: from localhost ([::1]:42142 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UGYF8-0005fV-Du for incoming@patchwork.ozlabs.org; Fri, 15 Mar 2013 13:16:34 -0400 Received: from eggs.gnu.org ([208.118.235.92]:47306) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UGYBT-00006Y-GS for qemu-devel@nongnu.org; Fri, 15 Mar 2013 13:12:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UGYBG-0000UF-OI for qemu-devel@nongnu.org; Fri, 15 Mar 2013 13:12:47 -0400 Received: from 1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.d.1.0.0.b.8.0.1.0.0.2.ip6.arpa ([2001:8b0:1d0::1]:32917 helo=mnementh.archaic.org.uk) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UGYBG-0000Q8-EH for qemu-devel@nongnu.org; Fri, 15 Mar 2013 13:12:34 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1UGXvr-0006Jh-Im; Fri, 15 Mar 2013 16:56:39 +0000 From: Peter Maydell To: Anthony Liguori , Blue Swirl Date: Fri, 15 Mar 2013 16:56:32 +0000 Message-Id: <1363366599-24238-11-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1363366599-24238-1-git-send-email-peter.maydell@linaro.org> References: <1363366599-24238-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Cc: qemu-devel@nongnu.org, Paul Brook Subject: [Qemu-devel] [PATCH 10/17] hw/vexpress: Set reset values for daughterboard oscillators X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Set the reset values for the VExpress daughterboard oscillators via the new sysctl properties. Signed-off-by: Peter Maydell --- hw/arm/vexpress.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index a2dc759..2e1a5d0 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -156,6 +156,8 @@ struct VEDBoardInfo { uint32_t proc_id; uint32_t num_voltage_sensors; const uint32_t *voltages; + uint32_t num_clocks; + const uint32_t *clocks; DBoardInitFn *init; }; @@ -260,6 +262,13 @@ static const uint32_t a9_voltages[] = { 3300000, /* VCC3V3 : 3.3V : local board supply for misc external logic */ }; +/* Reset values for daughterboard oscillators (in Hz) */ +static const uint32_t a9_clocks[] = { + 45000000, /* AMBA AXI ACLK: 45MHz */ + 23750000, /* daughterboard CLCD clock: 23.75MHz */ + 66670000, /* Test chip reference clock: 66.67MHz */ +}; + static const VEDBoardInfo a9_daughterboard = { .motherboard_map = motherboard_legacy_map, .loader_start = 0x60000000, @@ -267,6 +276,8 @@ static const VEDBoardInfo a9_daughterboard = { .proc_id = 0x0c000191, .num_voltage_sensors = ARRAY_SIZE(a9_voltages), .voltages = a9_voltages, + .num_clocks = ARRAY_SIZE(a9_clocks), + .clocks = a9_clocks, .init = a9_daughterboard_init, }; @@ -358,6 +369,18 @@ static const uint32_t a15_voltages[] = { 900000, /* Vcore: 0.9V : CPU core voltage */ }; +static const uint32_t a15_clocks[] = { + 60000000, /* OSCCLK0: 60MHz : CPU_CLK reference */ + 0, /* OSCCLK1: reserved */ + 0, /* OSCCLK2: reserved */ + 0, /* OSCCLK3: reserved */ + 40000000, /* OSCCLK4: 40MHz : external AXI master clock */ + 23750000, /* OSCCLK5: 23.75MHz : HDLCD PLL reference */ + 50000000, /* OSCCLK6: 50MHz : static memory controller clock */ + 60000000, /* OSCCLK7: 60MHz : SYSCLK reference */ + 40000000, /* OSCCLK8: 40MHz : DDR2 PLL reference */ +}; + static const VEDBoardInfo a15_daughterboard = { .motherboard_map = motherboard_aseries_map, .loader_start = 0x80000000, @@ -365,6 +388,8 @@ static const VEDBoardInfo a15_daughterboard = { .proc_id = 0x14000237, .num_voltage_sensors = ARRAY_SIZE(a15_voltages), .voltages = a15_voltages, + .num_clocks = ARRAY_SIZE(a15_clocks), + .clocks = a15_clocks, .init = a15_daughterboard_init, }; @@ -400,6 +425,13 @@ static void vexpress_common_init(const VEDBoardInfo *daughterboard, qdev_prop_set_uint32(sysctl, propname, daughterboard->voltages[i]); g_free(propname); } + qdev_prop_set_uint32(sysctl, "len-db-clock", + daughterboard->num_clocks); + for (i = 0; i < daughterboard->num_clocks; i++) { + char *propname = g_strdup_printf("db-clock[%d]", i); + qdev_prop_set_uint32(sysctl, propname, daughterboard->clocks[i]); + g_free(propname); + } qdev_init_nofail(sysctl); sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, map[VE_SYSREGS]);