Patchwork [1/6] powerpc/fsl-booke: Add initial silicon device tree files for B4860QDS

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Submitter Shaveta Leekha
Date March 15, 2013, 7:55 a.m.
Message ID <1363334109-21922-1-git-send-email-shaveta@freescale.com>
Download mbox | patch
Permalink /patch/227866/
State Superseded
Delegated to: Kumar Gala
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Comments

Shaveta Leekha - March 15, 2013, 7:55 a.m.
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
---
 arch/powerpc/boot/dts/fsl/b4860si-post.dtsi |  184 +++++++++++++++++++++++++++
 arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi  |   80 ++++++++++++
 2 files changed, 264 insertions(+), 0 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
Timur Tabi - March 15, 2013, 1:07 p.m.
On Fri, Mar 15, 2013 at 2:55 AM, Shaveta Leekha <shaveta@freescale.com> wrote:


> +       iommu@20000 {
> +               compatible = "fsl,pamu-v1.0", "fsl,pamu";
> +               reg = <0x20000 0x4000>;
> +               interrupts = <
> +                       24 2 0 0
> +                       16 2 1 1>;
> +       };

You need to add the PAMU topology.
Kumar Gala - March 15, 2013, 3:54 p.m.
On Mar 15, 2013, at 2:55 AM, Shaveta Leekha wrote:

> Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
> Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> Signed-off-by: Andy Fleming <afleming@freescale.com>
> ---
> arch/powerpc/boot/dts/fsl/b4860si-post.dtsi |  184 +++++++++++++++++++++++++++
> arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi  |   80 ++++++++++++
> 2 files changed, 264 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
> create mode 100644 arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi

Commit description should convey what hw isn't yet covered as well.

DPAA, DSPs, etc.

- k

> 
> diff --git a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
> new file mode 100644
> index 0000000..2db68b2
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
> @@ -0,0 +1,184 @@
> +/*
> + * B4860 Silicon/SoC Device Tree Source (post include)
> + *
> + * Copyright 2012 Freescale Semiconductor Inc.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are met:
> + *     * Redistributions of source code must retain the above copyright
> + *       notice, this list of conditions and the following disclaimer.
> + *     * Redistributions in binary form must reproduce the above copyright
> + *       notice, this list of conditions and the following disclaimer in the
> + *       documentation and/or other materials provided with the distribution.
> + *     * Neither the name of Freescale Semiconductor nor the
> + *       names of its contributors may be used to endorse or promote products
> + *       derived from this software without specific prior written permission.
> + *
> + *
> + * ALTERNATIVELY, this software may be distributed under the terms of the
> + * GNU General Public License ("GPL") as published by the Free Software
> + * Foundation, either version 2 of that License or (at your option) any
> + * later version.
> + *
> + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
> + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
> + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
> + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
> + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
> + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
> + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +&ifc {
> +	#address-cells = <2>;
> +	#size-cells = <1>;
> +	compatible = "fsl,ifc", "simple-bus";
> +	interrupts = <25 2 0 0>;
> +};
> +
> +/* controller at 0x200000 */
> +&pci0 {
> +	compatible = "fsl,b4860-pcie", "fsl,qoriq-pcie-v2.4";
> +	device_type = "pci";
> +	#size-cells = <2>;
> +	#address-cells = <3>;
> +	bus-range = <0x0 0xff>;
> +	interrupts = <20 2 0 0>;
> +	pcie@0 {
> +		#interrupt-cells = <1>;
> +		#size-cells = <2>;
> +		#address-cells = <3>;
> +		device_type = "pci";
> +		interrupts = <20 2 0 0>;
> +		interrupt-map-mask = <0xf800 0 0 7>;
> +		interrupt-map = <
> +			/* IDSEL 0x0 */
> +			0000 0 0 1 &mpic 40 1 0 0
> +			0000 0 0 2 &mpic 1 1 0 0
> +			0000 0 0 3 &mpic 2 1 0 0
> +			0000 0 0 4 &mpic 3 1 0 0
> +			>;
> +	};
> +};
> +
> +&rio {
> +	compatible = "fsl,srio";
> +	interrupts = <16 2 1 11>;
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +	ranges;
> +
> +	port1 {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		cell-index = <1>;
> +	};
> +
> +	port2 {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		cell-index = <2>;
> +	};
> +};
> +
> +&soc {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +	device_type = "soc";
> +	compatible = "simple-bus";
> +
> +	soc-sram-error {
> +		compatible = "fsl,soc-sram-error";
> +		interrupts = <16 2 1 2>;
> +	};
> +
> +	corenet-law@0 {
> +		compatible = "fsl,corenet-law";
> +		reg = <0x0 0x1000>;
> +		fsl,num-laws = <32>;
> +	};
> +
> +	ddr1: memory-controller@8000 {
> +		compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
> +		reg = <0x8000 0x1000>;
> +		interrupts = <16 2 1 8>;
> +	};
> +
> +	ddr2: memory-controller@9000 {
> +		compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
> +		reg = <0x9000 0x1000>;
> +		interrupts = <16 2 1 9>;
> +	};
> +
> +	cpc: l3-cache-controller@10000 {
> +		compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
> +		reg = <0x10000 0x1000
> +		       0x11000 0x1000>;
> +		interrupts = <16 2 1 4
> +			      16 2 1 5>;
> +	};
> +
> +	corenet-cf@18000 {
> +		compatible = "fsl,corenet-cf";
> +		reg = <0x18000 0x1000>;
> +		interrupts = <16 2 1 0>;
> +		fsl,ccf-num-csdids = <32>;
> +		fsl,ccf-num-snoopids = <32>;
> +	};
> +
> +	iommu@20000 {
> +		compatible = "fsl,pamu-v1.0", "fsl,pamu";
> +		reg = <0x20000 0x4000>;
> +		interrupts = <
> +			24 2 0 0
> +			16 2 1 1>;
> +	};
> +
> +/include/ "qoriq-mpic.dtsi"
> +
> +	guts: global-utilities@e0000 {
> +		compatible = "fsl,b4860-device-config";
> +		reg = <0xe0000 0xe00>;
> +		fsl,has-rstcr;
> +		fsl,liodn-bits = <12>;
> +	};
> +
> +	clockgen: global-utilities@e1000 {
> +		compatible = "fsl,b4860-clockgen", "fsl,qoriq-clockgen-2";
> +		reg = <0xe1000 0x1000>;
> +	};
> +
> +	rcpm: global-utilities@e2000 {
> +		compatible = "fsl,b4860-rcpm", "fsl,qoriq-rcpm-2";
> +		reg = <0xe2000 0x1000>;
> +	};
> +
> +/include/ "qoriq-dma-0.dtsi"
> +/include/ "qoriq-dma-1.dtsi"
> +
> +/include/ "qonverge-usb2-dr-0.dtsi"
> +	usb0: usb@210000 {
> +		compatible = "fsl-usb2-dr-v2.4", "fsl-usb2-dr";
> +	};
> +
> +/include/ "qoriq-espi-0.dtsi"
> +	spi@110000 {
> +		fsl,espi-num-chipselects = <4>;
> +	};
> +
> +/include/ "qoriq-esdhc-0.dtsi"
> +	sdhc@114000 {
> +		sdhci,auto-cmd12;
> +	};
> +/include/ "qoriq-i2c-0.dtsi"
> +/include/ "qoriq-i2c-1.dtsi"
> +/include/ "qoriq-duart-0.dtsi"
> +/include/ "qoriq-duart-1.dtsi"
> +
> +	L2: l2-cache-controller@c20000 {
> +		next-level-cache = <&cpc>;
> +	};
> +};
> diff --git a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
> new file mode 100644
> index 0000000..33bc600
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
> @@ -0,0 +1,80 @@
> +/*
> + * B4860 Silicon/SoC Device Tree Source (pre include)
> + *
> + * Copyright 2012 Freescale Semiconductor Inc.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are met:
> + *     * Redistributions of source code must retain the above copyright
> + *       notice, this list of conditions and the following disclaimer.
> + *     * Redistributions in binary form must reproduce the above copyright
> + *       notice, this list of conditions and the following disclaimer in the
> + *       documentation and/or other materials provided with the distribution.
> + *     * Neither the name of Freescale Semiconductor nor the
> + *       names of its contributors may be used to endorse or promote products
> + *       derived from this software without specific prior written permission.
> + *
> + *
> + * ALTERNATIVELY, this software may be distributed under the terms of the
> + * GNU General Public License ("GPL") as published by the Free Software
> + * Foundation, either version 2 of that License or (at your option) any
> + * later version.
> + *
> + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
> + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
> + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
> + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
> + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
> + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
> + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +/dts-v1/;
> +/ {
> +	compatible = "fsl,B4860";
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +	interrupt-parent = <&mpic>;
> +
> +	aliases {
> +		ccsr = &soc;
> +
> +		serial0 = &serial0;
> +		serial1 = &serial1;
> +		serial2 = &serial2;
> +		serial3 = &serial3;
> +		pci0 = &pci0;
> +		dma0 = &dma0;
> +		dma1 = &dma1;
> +		sdhc = &sdhc;
> +	};
> +
> +	cpus {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		PowerPC,e6500@0 {
> +			device_type = "cpu";
> +			reg = <0 1>;
> +			next-level-cache = <&L2>;
> +		};
> +		PowerPC,e6500@1 {
> +			device_type = "cpu";
> +			reg = <2 3>;
> +			next-level-cache = <&L2>;
> +		};
> +		PowerPC,e6500@2 {
> +			device_type = "cpu";
> +			reg = <4 5>;
> +			next-level-cache = <&L2>;
> +		};
> +		PowerPC,e6500@3 {
> +			device_type = "cpu";
> +			reg = <6 7>;
> +			next-level-cache = <&L2>;
> +		};
> +	};
> +};
> -- 
> 1.7.6.GIT
>
Kumar Gala - March 15, 2013, 8:29 p.m.
On Mar 15, 2013, at 2:55 AM, Shaveta Leekha wrote:

> Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
> Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> Signed-off-by: Andy Fleming <afleming@freescale.com>
> ---
> arch/powerpc/boot/dts/fsl/b4860si-post.dtsi |  184 +++++++++++++++++++++++++++
> arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi  |   80 ++++++++++++
> 2 files changed, 264 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
> create mode 100644 arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi

* SEC node is missing
* DCSR nodes are missing.

- k

> 
> diff --git a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
> new file mode 100644
> index 0000000..2db68b2
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
> @@ -0,0 +1,184 @@
> +/*
> + * B4860 Silicon/SoC Device Tree Source (post include)
> + *
> + * Copyright 2012 Freescale Semiconductor Inc.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are met:
> + *     * Redistributions of source code must retain the above copyright
> + *       notice, this list of conditions and the following disclaimer.
> + *     * Redistributions in binary form must reproduce the above copyright
> + *       notice, this list of conditions and the following disclaimer in the
> + *       documentation and/or other materials provided with the distribution.
> + *     * Neither the name of Freescale Semiconductor nor the
> + *       names of its contributors may be used to endorse or promote products
> + *       derived from this software without specific prior written permission.
> + *
> + *
> + * ALTERNATIVELY, this software may be distributed under the terms of the
> + * GNU General Public License ("GPL") as published by the Free Software
> + * Foundation, either version 2 of that License or (at your option) any
> + * later version.
> + *
> + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
> + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
> + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
> + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
> + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
> + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
> + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +&ifc {
> +	#address-cells = <2>;
> +	#size-cells = <1>;
> +	compatible = "fsl,ifc", "simple-bus";
> +	interrupts = <25 2 0 0>;
> +};
> +
> +/* controller at 0x200000 */
> +&pci0 {
> +	compatible = "fsl,b4860-pcie", "fsl,qoriq-pcie-v2.4";
> +	device_type = "pci";
> +	#size-cells = <2>;
> +	#address-cells = <3>;
> +	bus-range = <0x0 0xff>;
> +	interrupts = <20 2 0 0>;
> +	pcie@0 {
> +		#interrupt-cells = <1>;
> +		#size-cells = <2>;
> +		#address-cells = <3>;
> +		device_type = "pci";
> +		interrupts = <20 2 0 0>;
> +		interrupt-map-mask = <0xf800 0 0 7>;
> +		interrupt-map = <
> +			/* IDSEL 0x0 */
> +			0000 0 0 1 &mpic 40 1 0 0
> +			0000 0 0 2 &mpic 1 1 0 0
> +			0000 0 0 3 &mpic 2 1 0 0
> +			0000 0 0 4 &mpic 3 1 0 0
> +			>;
> +	};
> +};
> +
> +&rio {
> +	compatible = "fsl,srio";
> +	interrupts = <16 2 1 11>;
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +	ranges;
> +
> +	port1 {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		cell-index = <1>;
> +	};
> +
> +	port2 {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		cell-index = <2>;
> +	};
> +};
> +
> +&soc {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +	device_type = "soc";
> +	compatible = "simple-bus";
> +
> +	soc-sram-error {
> +		compatible = "fsl,soc-sram-error";
> +		interrupts = <16 2 1 2>;
> +	};
> +
> +	corenet-law@0 {
> +		compatible = "fsl,corenet-law";
> +		reg = <0x0 0x1000>;
> +		fsl,num-laws = <32>;
> +	};
> +
> +	ddr1: memory-controller@8000 {
> +		compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
> +		reg = <0x8000 0x1000>;
> +		interrupts = <16 2 1 8>;
> +	};
> +
> +	ddr2: memory-controller@9000 {
> +		compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
> +		reg = <0x9000 0x1000>;
> +		interrupts = <16 2 1 9>;
> +	};
> +
> +	cpc: l3-cache-controller@10000 {
> +		compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
> +		reg = <0x10000 0x1000
> +		       0x11000 0x1000>;
> +		interrupts = <16 2 1 4
> +			      16 2 1 5>;
> +	};
> +
> +	corenet-cf@18000 {
> +		compatible = "fsl,corenet-cf";
> +		reg = <0x18000 0x1000>;
> +		interrupts = <16 2 1 0>;
> +		fsl,ccf-num-csdids = <32>;
> +		fsl,ccf-num-snoopids = <32>;
> +	};
> +
> +	iommu@20000 {
> +		compatible = "fsl,pamu-v1.0", "fsl,pamu";
> +		reg = <0x20000 0x4000>;
> +		interrupts = <
> +			24 2 0 0
> +			16 2 1 1>;
> +	};
> +
> +/include/ "qoriq-mpic.dtsi"
> +
> +	guts: global-utilities@e0000 {
> +		compatible = "fsl,b4860-device-config";
> +		reg = <0xe0000 0xe00>;
> +		fsl,has-rstcr;
> +		fsl,liodn-bits = <12>;
> +	};
> +
> +	clockgen: global-utilities@e1000 {
> +		compatible = "fsl,b4860-clockgen", "fsl,qoriq-clockgen-2";
> +		reg = <0xe1000 0x1000>;
> +	};
> +
> +	rcpm: global-utilities@e2000 {
> +		compatible = "fsl,b4860-rcpm", "fsl,qoriq-rcpm-2";
> +		reg = <0xe2000 0x1000>;
> +	};
> +
> +/include/ "qoriq-dma-0.dtsi"
> +/include/ "qoriq-dma-1.dtsi"
> +
> +/include/ "qonverge-usb2-dr-0.dtsi"
> +	usb0: usb@210000 {
> +		compatible = "fsl-usb2-dr-v2.4", "fsl-usb2-dr";
> +	};
> +
> +/include/ "qoriq-espi-0.dtsi"
> +	spi@110000 {
> +		fsl,espi-num-chipselects = <4>;
> +	};
> +
> +/include/ "qoriq-esdhc-0.dtsi"
> +	sdhc@114000 {
> +		sdhci,auto-cmd12;
> +	};
> +/include/ "qoriq-i2c-0.dtsi"
> +/include/ "qoriq-i2c-1.dtsi"
> +/include/ "qoriq-duart-0.dtsi"
> +/include/ "qoriq-duart-1.dtsi"
> +
> +	L2: l2-cache-controller@c20000 {
> +		next-level-cache = <&cpc>;

should have compatible & reg nodes

> +	};
> +};

[ snip ]

- k
Leekha Shaveta-B20052 - March 18, 2013, 6:59 a.m.
-----Original Message-----
From: Kumar Gala [mailto:galak@kernel.crashing.org] 
Sent: Saturday, March 16, 2013 2:00 AM
To: Leekha Shaveta-B20052
Cc: linuxppc-dev@lists.ozlabs.org; Zhao Chenhui-B35336; Li Yang-R58472; Tang Yuantian-B29983; Sethi Varun-B16395; Lian Minghuan-B31939; Mehresh Ramneek-B31383; Fleming Andy-AFLEMING
Subject: Re: [PATCH 1/6] powerpc/fsl-booke: Add initial silicon device tree files for B4860QDS


On Mar 15, 2013, at 2:55 AM, Shaveta Leekha wrote:

> Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
> Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> Signed-off-by: Andy Fleming <afleming@freescale.com>
> ---
> arch/powerpc/boot/dts/fsl/b4860si-post.dtsi |  184 +++++++++++++++++++++++++++
> arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi  |   80 ++++++++++++
> 2 files changed, 264 insertions(+), 0 deletions(-) create mode 100644 
> arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
> create mode 100644 arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi

* SEC node is missing
* DCSR nodes are missing.

- k

[SL] will add sec node, same reply for dcsr.


> 
> diff --git a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi 
> b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
> new file mode 100644
> index 0000000..2db68b2
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
> @@ -0,0 +1,184 @@
> +/*
> + * B4860 Silicon/SoC Device Tree Source (post include)
> + *
> + * Copyright 2012 Freescale Semiconductor Inc.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are met:
> + *     * Redistributions of source code must retain the above copyright
> + *       notice, this list of conditions and the following disclaimer.
> + *     * Redistributions in binary form must reproduce the above copyright
> + *       notice, this list of conditions and the following disclaimer in the
> + *       documentation and/or other materials provided with the distribution.
> + *     * Neither the name of Freescale Semiconductor nor the
> + *       names of its contributors may be used to endorse or promote products
> + *       derived from this software without specific prior written permission.
> + *
> + *
> + * ALTERNATIVELY, this software may be distributed under the terms of 
> +the
> + * GNU General Public License ("GPL") as published by the Free 
> +Software
> + * Foundation, either version 2 of that License or (at your option) 
> +any
> + * later version.
> + *
> + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND 
> +ANY
> + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
> +IMPLIED
> + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
> +ARE
> + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE 
> +FOR ANY
> + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
> +DAMAGES
> + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
> +SERVICES;
> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 
> +CAUSED AND
> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 
> +OR TORT
> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
> +USE OF THIS
> + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +&ifc {
> +	#address-cells = <2>;
> +	#size-cells = <1>;
> +	compatible = "fsl,ifc", "simple-bus";
> +	interrupts = <25 2 0 0>;
> +};
> +
> +/* controller at 0x200000 */
> +&pci0 {
> +	compatible = "fsl,b4860-pcie", "fsl,qoriq-pcie-v2.4";
> +	device_type = "pci";
> +	#size-cells = <2>;
> +	#address-cells = <3>;
> +	bus-range = <0x0 0xff>;
> +	interrupts = <20 2 0 0>;
> +	pcie@0 {
> +		#interrupt-cells = <1>;
> +		#size-cells = <2>;
> +		#address-cells = <3>;
> +		device_type = "pci";
> +		interrupts = <20 2 0 0>;
> +		interrupt-map-mask = <0xf800 0 0 7>;
> +		interrupt-map = <
> +			/* IDSEL 0x0 */
> +			0000 0 0 1 &mpic 40 1 0 0
> +			0000 0 0 2 &mpic 1 1 0 0
> +			0000 0 0 3 &mpic 2 1 0 0
> +			0000 0 0 4 &mpic 3 1 0 0
> +			>;
> +	};
> +};
> +
> +&rio {
> +	compatible = "fsl,srio";
> +	interrupts = <16 2 1 11>;
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +	ranges;
> +
> +	port1 {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		cell-index = <1>;
> +	};
> +
> +	port2 {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		cell-index = <2>;
> +	};
> +};
> +
> +&soc {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +	device_type = "soc";
> +	compatible = "simple-bus";
> +
> +	soc-sram-error {
> +		compatible = "fsl,soc-sram-error";
> +		interrupts = <16 2 1 2>;
> +	};
> +
> +	corenet-law@0 {
> +		compatible = "fsl,corenet-law";
> +		reg = <0x0 0x1000>;
> +		fsl,num-laws = <32>;
> +	};
> +
> +	ddr1: memory-controller@8000 {
> +		compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
> +		reg = <0x8000 0x1000>;
> +		interrupts = <16 2 1 8>;
> +	};
> +
> +	ddr2: memory-controller@9000 {
> +		compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
> +		reg = <0x9000 0x1000>;
> +		interrupts = <16 2 1 9>;
> +	};
> +
> +	cpc: l3-cache-controller@10000 {
> +		compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
> +		reg = <0x10000 0x1000
> +		       0x11000 0x1000>;
> +		interrupts = <16 2 1 4
> +			      16 2 1 5>;
> +	};
> +
> +	corenet-cf@18000 {
> +		compatible = "fsl,corenet-cf";
> +		reg = <0x18000 0x1000>;
> +		interrupts = <16 2 1 0>;
> +		fsl,ccf-num-csdids = <32>;
> +		fsl,ccf-num-snoopids = <32>;
> +	};
> +
> +	iommu@20000 {
> +		compatible = "fsl,pamu-v1.0", "fsl,pamu";
> +		reg = <0x20000 0x4000>;
> +		interrupts = <
> +			24 2 0 0
> +			16 2 1 1>;
> +	};
> +
> +/include/ "qoriq-mpic.dtsi"
> +
> +	guts: global-utilities@e0000 {
> +		compatible = "fsl,b4860-device-config";
> +		reg = <0xe0000 0xe00>;
> +		fsl,has-rstcr;
> +		fsl,liodn-bits = <12>;
> +	};
> +
> +	clockgen: global-utilities@e1000 {
> +		compatible = "fsl,b4860-clockgen", "fsl,qoriq-clockgen-2";
> +		reg = <0xe1000 0x1000>;
> +	};
> +
> +	rcpm: global-utilities@e2000 {
> +		compatible = "fsl,b4860-rcpm", "fsl,qoriq-rcpm-2";
> +		reg = <0xe2000 0x1000>;
> +	};
> +
> +/include/ "qoriq-dma-0.dtsi"
> +/include/ "qoriq-dma-1.dtsi"
> +
> +/include/ "qonverge-usb2-dr-0.dtsi"
> +	usb0: usb@210000 {
> +		compatible = "fsl-usb2-dr-v2.4", "fsl-usb2-dr";
> +	};
> +
> +/include/ "qoriq-espi-0.dtsi"
> +	spi@110000 {
> +		fsl,espi-num-chipselects = <4>;
> +	};
> +
> +/include/ "qoriq-esdhc-0.dtsi"
> +	sdhc@114000 {
> +		sdhci,auto-cmd12;
> +	};
> +/include/ "qoriq-i2c-0.dtsi"
> +/include/ "qoriq-i2c-1.dtsi"
> +/include/ "qoriq-duart-0.dtsi"
> +/include/ "qoriq-duart-1.dtsi"
> +
> +	L2: l2-cache-controller@c20000 {
> +		next-level-cache = <&cpc>;

should have compatible & reg nodes
[SL] agree. Will add 

> +	};
> +};

[ snip ]

- k

Regards,
Shaveta
Leekha Shaveta-B20052 - March 18, 2013, 7:41 a.m.
-----Original Message-----
From: Timur Tabi [mailto:timur@tabi.org] 
Sent: Friday, March 15, 2013 6:38 PM
To: Leekha Shaveta-B20052
Cc: linuxppc-dev@lists.ozlabs.org; Zhao Chenhui-B35336; Lian Minghuan-B31939; Tang Yuantian-B29983; Fleming Andy-AFLEMING; Mehresh Ramneek-B31383; Sethi Varun-B16395
Subject: Re: [PATCH 1/6] powerpc/fsl-booke: Add initial silicon device tree files for B4860QDS

On Fri, Mar 15, 2013 at 2:55 AM, Shaveta Leekha <shaveta@freescale.com> wrote:


> +       iommu@20000 {
> +               compatible = "fsl,pamu-v1.0", "fsl,pamu";
> +               reg = <0x20000 0x4000>;
> +               interrupts = <
> +                       24 2 0 0
> +                       16 2 1 1>;
> +       };

You need to add the PAMU topology.
[SL] Thanks for reviewing the patches.
These patches are on similar lines as T4 initial support
In due course of time, we plan to add pamu topology and pamu related support in various devices both for T4 and B4.
Kumar can you please suggest?

Regards,
Shaveta
Kumar Gala - March 18, 2013, 3:03 p.m.
On Mar 18, 2013, at 2:41 AM, Leekha Shaveta-B20052 wrote:

> 
> 
> -----Original Message-----
> From: Timur Tabi [mailto:timur@tabi.org] 
> Sent: Friday, March 15, 2013 6:38 PM
> To: Leekha Shaveta-B20052
> Cc: linuxppc-dev@lists.ozlabs.org; Zhao Chenhui-B35336; Lian Minghuan-B31939; Tang Yuantian-B29983; Fleming Andy-AFLEMING; Mehresh Ramneek-B31383; Sethi Varun-B16395
> Subject: Re: [PATCH 1/6] powerpc/fsl-booke: Add initial silicon device tree files for B4860QDS
> 
> On Fri, Mar 15, 2013 at 2:55 AM, Shaveta Leekha <shaveta@freescale.com> wrote:
> 
> 
>> +       iommu@20000 {
>> +               compatible = "fsl,pamu-v1.0", "fsl,pamu";
>> +               reg = <0x20000 0x4000>;
>> +               interrupts = <
>> +                       24 2 0 0
>> +                       16 2 1 1>;
>> +       };
> 
> You need to add the PAMU topology.
> [SL] Thanks for reviewing the patches.
> These patches are on similar lines as T4 initial support
> In due course of time, we plan to add pamu topology and pamu related support in various devices both for T4 and B4.
> Kumar can you please suggest?

I can help with the B4 topology as its reasonable well described, I've been working on trying to get the info to finish T4.

- k
Leekha Shaveta-B20052 - March 19, 2013, 6:13 a.m.
-----Original Message-----
From: Kumar Gala [mailto:galak@kernel.crashing.org] 
Sent: Monday, March 18, 2013 8:34 PM
To: Leekha Shaveta-B20052
Cc: Timur Tabi; linuxppc-dev@lists.ozlabs.org; Zhao Chenhui-B35336; Lian Minghuan-B31939; Tang Yuantian-B29983; Fleming Andy-AFLEMING; Mehresh Ramneek-B31383; Sethi Varun-B16395
Subject: Re: [PATCH 1/6] powerpc/fsl-booke: Add initial silicon device tree files for B4860QDS


On Mar 18, 2013, at 2:41 AM, Leekha Shaveta-B20052 wrote:

> 
> 
> -----Original Message-----
> From: Timur Tabi [mailto:timur@tabi.org]
> Sent: Friday, March 15, 2013 6:38 PM
> To: Leekha Shaveta-B20052
> Cc: linuxppc-dev@lists.ozlabs.org; Zhao Chenhui-B35336; Lian 
> Minghuan-B31939; Tang Yuantian-B29983; Fleming Andy-AFLEMING; Mehresh 
> Ramneek-B31383; Sethi Varun-B16395
> Subject: Re: [PATCH 1/6] powerpc/fsl-booke: Add initial silicon device 
> tree files for B4860QDS
> 
> On Fri, Mar 15, 2013 at 2:55 AM, Shaveta Leekha <shaveta@freescale.com> wrote:
> 
> 
>> +       iommu@20000 {
>> +               compatible = "fsl,pamu-v1.0", "fsl,pamu";
>> +               reg = <0x20000 0x4000>;
>> +               interrupts = <
>> +                       24 2 0 0
>> +                       16 2 1 1>;
>> +       };
> 
> You need to add the PAMU topology.
> [SL] Thanks for reviewing the patches.
> These patches are on similar lines as T4 initial support In due course 
> of time, we plan to add pamu topology and pamu related support in various devices both for T4 and B4.
> Kumar can you please suggest?

I can help with the B4 topology as its reasonable well described, I've been working on trying to get the info to finish T4.
[SL] I have seen your patches to add PAMU topology in B4. Should I include them in my set of patches or you would send them above my initial set of patches?
BR,
Shaveta
- k
Leekha Shaveta-B20052 - March 20, 2013, 10:32 a.m.
-----Original Message-----
From: Leekha Shaveta-B20052 
Sent: Tuesday, March 19, 2013 11:43 AM
To: 'Kumar Gala'
Cc: Timur Tabi; linuxppc-dev@lists.ozlabs.org; Zhao Chenhui-B35336; Lian Minghuan-B31939; Tang Yuantian-B29983; Fleming Andy-AFLEMING; Mehresh Ramneek-B31383; Sethi Varun-B16395
Subject: RE: [PATCH 1/6] powerpc/fsl-booke: Add initial silicon device tree files for B4860QDS



-----Original Message-----
From: Kumar Gala [mailto:galak@kernel.crashing.org] 
Sent: Monday, March 18, 2013 8:34 PM
To: Leekha Shaveta-B20052
Cc: Timur Tabi; linuxppc-dev@lists.ozlabs.org; Zhao Chenhui-B35336; Lian Minghuan-B31939; Tang Yuantian-B29983; Fleming Andy-AFLEMING; Mehresh Ramneek-B31383; Sethi Varun-B16395
Subject: Re: [PATCH 1/6] powerpc/fsl-booke: Add initial silicon device tree files for B4860QDS


On Mar 18, 2013, at 2:41 AM, Leekha Shaveta-B20052 wrote:

> 
> 
> -----Original Message-----
> From: Timur Tabi [mailto:timur@tabi.org]
> Sent: Friday, March 15, 2013 6:38 PM
> To: Leekha Shaveta-B20052
> Cc: linuxppc-dev@lists.ozlabs.org; Zhao Chenhui-B35336; Lian 
> Minghuan-B31939; Tang Yuantian-B29983; Fleming Andy-AFLEMING; Mehresh 
> Ramneek-B31383; Sethi Varun-B16395
> Subject: Re: [PATCH 1/6] powerpc/fsl-booke: Add initial silicon device 
> tree files for B4860QDS
> 
> On Fri, Mar 15, 2013 at 2:55 AM, Shaveta Leekha <shaveta@freescale.com> wrote:
> 
> 
>> +       iommu@20000 {
>> +               compatible = "fsl,pamu-v1.0", "fsl,pamu";
>> +               reg = <0x20000 0x4000>;
>> +               interrupts = <
>> +                       24 2 0 0
>> +                       16 2 1 1>;
>> +       };
> 
> You need to add the PAMU topology.
> [SL] Thanks for reviewing the patches.
> These patches are on similar lines as T4 initial support In due course 
> of time, we plan to add pamu topology and pamu related support in various devices both for T4 and B4.
> Kumar can you please suggest?

I can help with the B4 topology as its reasonable well described, I've been working on trying to get the info to finish T4.
[SL] I have seen your patches to add PAMU topology in B4. Should I include them in my set of patches or you would send them above my initial set of patches?
BR,
Shaveta
[SL] Kumar, Waiting for your response on it. Thought I have sent new set of patches with the refactoring suggested, but not added PAMU in them.

BR,
Shaveta
Timur Tabi - March 20, 2013, 11:37 a.m.
Leekha Shaveta-B20052 wrote:
> [SL] Kumar, Waiting for your response on it. Thought I have sent new
> set of patches with the refactoring suggested, but not added PAMU in
> them.

If you have the information, why wouldn't you include it in the patch? 
The hard part has already been done for you!

Patch

diff --git a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
new file mode 100644
index 0000000..2db68b2
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
@@ -0,0 +1,184 @@ 
+/*
+ * B4860 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&ifc {
+	#address-cells = <2>;
+	#size-cells = <1>;
+	compatible = "fsl,ifc", "simple-bus";
+	interrupts = <25 2 0 0>;
+};
+
+/* controller at 0x200000 */
+&pci0 {
+	compatible = "fsl,b4860-pcie", "fsl,qoriq-pcie-v2.4";
+	device_type = "pci";
+	#size-cells = <2>;
+	#address-cells = <3>;
+	bus-range = <0x0 0xff>;
+	interrupts = <20 2 0 0>;
+	pcie@0 {
+		#interrupt-cells = <1>;
+		#size-cells = <2>;
+		#address-cells = <3>;
+		device_type = "pci";
+		interrupts = <20 2 0 0>;
+		interrupt-map-mask = <0xf800 0 0 7>;
+		interrupt-map = <
+			/* IDSEL 0x0 */
+			0000 0 0 1 &mpic 40 1 0 0
+			0000 0 0 2 &mpic 1 1 0 0
+			0000 0 0 3 &mpic 2 1 0 0
+			0000 0 0 4 &mpic 3 1 0 0
+			>;
+	};
+};
+
+&rio {
+	compatible = "fsl,srio";
+	interrupts = <16 2 1 11>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+	ranges;
+
+	port1 {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		cell-index = <1>;
+	};
+
+	port2 {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		cell-index = <2>;
+	};
+};
+
+&soc {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	device_type = "soc";
+	compatible = "simple-bus";
+
+	soc-sram-error {
+		compatible = "fsl,soc-sram-error";
+		interrupts = <16 2 1 2>;
+	};
+
+	corenet-law@0 {
+		compatible = "fsl,corenet-law";
+		reg = <0x0 0x1000>;
+		fsl,num-laws = <32>;
+	};
+
+	ddr1: memory-controller@8000 {
+		compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
+		reg = <0x8000 0x1000>;
+		interrupts = <16 2 1 8>;
+	};
+
+	ddr2: memory-controller@9000 {
+		compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
+		reg = <0x9000 0x1000>;
+		interrupts = <16 2 1 9>;
+	};
+
+	cpc: l3-cache-controller@10000 {
+		compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
+		reg = <0x10000 0x1000
+		       0x11000 0x1000>;
+		interrupts = <16 2 1 4
+			      16 2 1 5>;
+	};
+
+	corenet-cf@18000 {
+		compatible = "fsl,corenet-cf";
+		reg = <0x18000 0x1000>;
+		interrupts = <16 2 1 0>;
+		fsl,ccf-num-csdids = <32>;
+		fsl,ccf-num-snoopids = <32>;
+	};
+
+	iommu@20000 {
+		compatible = "fsl,pamu-v1.0", "fsl,pamu";
+		reg = <0x20000 0x4000>;
+		interrupts = <
+			24 2 0 0
+			16 2 1 1>;
+	};
+
+/include/ "qoriq-mpic.dtsi"
+
+	guts: global-utilities@e0000 {
+		compatible = "fsl,b4860-device-config";
+		reg = <0xe0000 0xe00>;
+		fsl,has-rstcr;
+		fsl,liodn-bits = <12>;
+	};
+
+	clockgen: global-utilities@e1000 {
+		compatible = "fsl,b4860-clockgen", "fsl,qoriq-clockgen-2";
+		reg = <0xe1000 0x1000>;
+	};
+
+	rcpm: global-utilities@e2000 {
+		compatible = "fsl,b4860-rcpm", "fsl,qoriq-rcpm-2";
+		reg = <0xe2000 0x1000>;
+	};
+
+/include/ "qoriq-dma-0.dtsi"
+/include/ "qoriq-dma-1.dtsi"
+
+/include/ "qonverge-usb2-dr-0.dtsi"
+	usb0: usb@210000 {
+		compatible = "fsl-usb2-dr-v2.4", "fsl-usb2-dr";
+	};
+
+/include/ "qoriq-espi-0.dtsi"
+	spi@110000 {
+		fsl,espi-num-chipselects = <4>;
+	};
+
+/include/ "qoriq-esdhc-0.dtsi"
+	sdhc@114000 {
+		sdhci,auto-cmd12;
+	};
+/include/ "qoriq-i2c-0.dtsi"
+/include/ "qoriq-i2c-1.dtsi"
+/include/ "qoriq-duart-0.dtsi"
+/include/ "qoriq-duart-1.dtsi"
+
+	L2: l2-cache-controller@c20000 {
+		next-level-cache = <&cpc>;
+	};
+};
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
new file mode 100644
index 0000000..33bc600
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
@@ -0,0 +1,80 @@ 
+/*
+ * B4860 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+	compatible = "fsl,B4860";
+	#address-cells = <2>;
+	#size-cells = <2>;
+	interrupt-parent = <&mpic>;
+
+	aliases {
+		ccsr = &soc;
+
+		serial0 = &serial0;
+		serial1 = &serial1;
+		serial2 = &serial2;
+		serial3 = &serial3;
+		pci0 = &pci0;
+		dma0 = &dma0;
+		dma1 = &dma1;
+		sdhc = &sdhc;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		PowerPC,e6500@0 {
+			device_type = "cpu";
+			reg = <0 1>;
+			next-level-cache = <&L2>;
+		};
+		PowerPC,e6500@1 {
+			device_type = "cpu";
+			reg = <2 3>;
+			next-level-cache = <&L2>;
+		};
+		PowerPC,e6500@2 {
+			device_type = "cpu";
+			reg = <4 5>;
+			next-level-cache = <&L2>;
+		};
+		PowerPC,e6500@3 {
+			device_type = "cpu";
+			reg = <6 7>;
+			next-level-cache = <&L2>;
+		};
+	};
+};