From patchwork Thu Mar 14 09:12:10 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hiroshi Doyu X-Patchwork-Id: 227513 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 866BE2C00A1 for ; Thu, 14 Mar 2013 20:12:31 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751856Ab3CNJMa (ORCPT ); Thu, 14 Mar 2013 05:12:30 -0400 Received: from hqemgate03.nvidia.com ([216.228.121.140]:18486 "EHLO hqemgate03.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751408Ab3CNJMa (ORCPT ); Thu, 14 Mar 2013 05:12:30 -0400 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate03.nvidia.com id ; Thu, 14 Mar 2013 02:17:41 -0700 Received: from hqemhub02.nvidia.com ([172.17.108.22]) by hqnvupgp07.nvidia.com (PGP Universal service); Thu, 14 Mar 2013 02:12:27 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Thu, 14 Mar 2013 02:12:27 -0700 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server id 8.3.298.1; Thu, 14 Mar 2013 02:12:26 -0700 Received: from daphne.nvidia.com (Not Verified[172.16.212.96]) by hqnvemgw01.nvidia.com with MailMarshal (v7,1,2,5326) id ; Thu, 14 Mar 2013 02:12:27 -0700 Received: from oreo.Nvidia.com (dhcp-10-21-25-186.nvidia.com [10.21.25.186]) by daphne.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id r2E9CN4q026478; Thu, 14 Mar 2013 02:12:24 -0700 (PDT) From: Hiroshi Doyu To: CC: Hiroshi Doyu , Stephen Warren , Greg Kroah-Hartman , Thierry Reding , Axel Lin , Subject: [PATCH 1/1] memory: tegra30: Fix build error w/o PM Date: Thu, 14 Mar 2013 11:12:10 +0200 Message-ID: <1363252334-4672-1-git-send-email-hdoyu@nvidia.com> X-Mailer: git-send-email 1.8.1.5 MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Make this depend on CONFIG_PM. Signed-off-by: Hiroshi Doyu Reviewed-by: Thierry Reding --- drivers/memory/tegra30-mc.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/memory/tegra30-mc.c b/drivers/memory/tegra30-mc.c index 0b97598..f4ae074 100644 --- a/drivers/memory/tegra30-mc.c +++ b/drivers/memory/tegra30-mc.c @@ -268,6 +268,7 @@ static const u32 tegra30_mc_ctx[] = { MC_INTMASK, }; +#ifdef CONFIG_PM static int tegra30_mc_suspend(struct device *dev) { int i; @@ -291,6 +292,7 @@ static int tegra30_mc_resume(struct device *dev) mc_readl(mc, MC_TIMING_CONTROL); return 0; } +#endif static UNIVERSAL_DEV_PM_OPS(tegra30_mc_pm, tegra30_mc_suspend,