From patchwork Tue Mar 12 10:31:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 226930 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 4E6422C0299 for ; Tue, 12 Mar 2013 22:07:58 +1100 (EST) Received: from localhost ([::1]:57515 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UFMcy-0002Mc-Gp for incoming@patchwork.ozlabs.org; Tue, 12 Mar 2013 06:40:16 -0400 Received: from eggs.gnu.org ([208.118.235.92]:44295) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UFMVM-0000KG-Vh for qemu-devel@nongnu.org; Tue, 12 Mar 2013 06:33:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UFMV5-0004mA-2u for qemu-devel@nongnu.org; Tue, 12 Mar 2013 06:32:24 -0400 Received: from ozlabs.org ([203.10.76.45]:54799) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UFMV4-0004jy-Ez; Tue, 12 Mar 2013 06:32:06 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 490B52C02B4; Tue, 12 Mar 2013 21:32:01 +1100 (EST) From: David Gibson To: agraf@suse.de Date: Tue, 12 Mar 2013 21:31:21 +1100 Message-Id: <1363084310-4115-20-git-send-email-david@gibson.dropbear.id.au> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1363084310-4115-1-git-send-email-david@gibson.dropbear.id.au> References: <1363084310-4115-1-git-send-email-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 203.10.76.45 Cc: David Gibson , qemu-ppc@nongnu.org, afaerber@suse.de, qemu-devel@nongnu.org Subject: [Qemu-devel] [PATCH 19/48] mmu-hash64: Remove nx from mmu_ctx_hash64 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The nx field in mmu_ctx_hash64 is used in two different functions. But its used for slightly different things in each place, and the value is never propagated between them. In other words, it might as well be two local variables. This patch makes it so. Signed-off-by: David Gibson --- target-ppc/mmu-hash64.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c index 654ef06..f89d005 100644 --- a/target-ppc/mmu-hash64.c +++ b/target-ppc/mmu-hash64.c @@ -47,7 +47,6 @@ struct mmu_ctx_hash64 { hwaddr hash[2]; /* Pagetable hash values */ target_ulong ptem; /* Virtual segment ID | API */ int key; /* Access key */ - int nx; /* Non-execute area */ }; /* @@ -235,7 +234,7 @@ target_ulong helper_load_slb_vsid(CPUPPCState *env, target_ulong rb) #define PTE64_CHECK_MASK (TARGET_PAGE_MASK | 0x7F) -static int ppc_hash64_pp_check(int key, int pp, int nx) +static int ppc_hash64_pp_check(int key, int pp, bool nx) { int access; @@ -269,7 +268,7 @@ static int ppc_hash64_pp_check(int key, int pp, int nx) break; } } - if (nx == 0) { + if (!nx) { access |= PAGE_EXEC; } @@ -312,11 +311,13 @@ static int pte64_check(struct mmu_ctx_hash64 *ctx, target_ulong pte0, ret = -1; /* Check validity and table match */ if ((pte0 & HPTE64_V_VALID) && (h == !!(pte0 & HPTE64_V_SECONDARY))) { + bool nx; + /* Check vsid & api */ mmask = PTE64_CHECK_MASK; pp = (pte1 & HPTE64_R_PP) | ((pte1 & HPTE64_R_PP0) >> 61); /* No execute if either noexec or guarded bits set */ - ctx->nx = (pte1 & HPTE64_R_N) || (pte1 & HPTE64_R_G); + nx = (pte1 & HPTE64_R_N) || (pte1 & HPTE64_R_G); if (HPTE64_V_COMPARE(pte0, ctx->ptem)) { if (ctx->raddr != (hwaddr)-1ULL) { /* all matches should have equal RPN, WIMG & PP */ @@ -326,7 +327,7 @@ static int pte64_check(struct mmu_ctx_hash64 *ctx, target_ulong pte0, } } /* Compute access rights */ - access = ppc_hash64_pp_check(ctx->key, pp, ctx->nx); + access = ppc_hash64_pp_check(ctx->key, pp, nx); /* Keep the matching PTE informations */ ctx->raddr = pte1; ctx->prot = access; @@ -466,7 +467,6 @@ static int get_segment64(CPUPPCState *env, struct mmu_ctx_hash64 *ctx, ? TARGET_PAGE_BITS_16M : TARGET_PAGE_BITS; ctx->key = !!(pr ? (slb->vsid & SLB_VSID_KP) : (slb->vsid & SLB_VSID_KS)); - ctx->nx = !!(slb->vsid & SLB_VSID_N); pageaddr = eaddr & ((1ULL << segment_bits) - (1ULL << target_page_bits)); @@ -480,11 +480,11 @@ static int get_segment64(CPUPPCState *env, struct mmu_ctx_hash64 *ctx, ((pageaddr >> 16) & ((1ULL << segment_bits) - 0x80)); LOG_MMU("pte segment: key=%d nx %d vsid " TARGET_FMT_lx "\n", - ctx->key, ctx->nx, vsid); + ctx->key, !!(slb->vsid & SLB_VSID_N), vsid); ret = -1; /* Check if instruction fetch is allowed, if needed */ - if (rwx != 2 || ctx->nx == 0) { + if (rwx != 2 || !(slb->vsid & SLB_VSID_N)) { /* Page address translation */ LOG_MMU("htab_base " TARGET_FMT_plx " htab_mask " TARGET_FMT_plx " hash " TARGET_FMT_plx "\n",