From patchwork Tue Mar 12 06:43:45 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 226823 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id DDFFA2C0299 for ; Tue, 12 Mar 2013 17:53:07 +1100 (EST) Received: from localhost ([::1]:43025 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UFIyf-0002IB-MT for incoming@patchwork.ozlabs.org; Tue, 12 Mar 2013 02:46:25 -0400 Received: from eggs.gnu.org ([208.118.235.92]:57605) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UFIwg-0007bC-TQ for qemu-devel@nongnu.org; Tue, 12 Mar 2013 02:44:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UFIwd-0006uS-Rs for qemu-devel@nongnu.org; Tue, 12 Mar 2013 02:44:22 -0400 Received: from mail-ie0-x230.google.com ([2607:f8b0:4001:c03::230]:59378) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UFIwd-0006u9-No for qemu-devel@nongnu.org; Tue, 12 Mar 2013 02:44:19 -0400 Received: by mail-ie0-f176.google.com with SMTP id k13so5808614iea.7 for ; Mon, 11 Mar 2013 23:44:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=Dmmsdo5p161n4NhuNBQ4ZbEhkvQ7weGBk99UFrXofsE=; b=nsWiwdLtZhwgpvSUl/mnO3kqWuvSx/2IKFtc7bg4oVQChws9Qqu2JG5xglXPZh9o8d i5C4+8xmu48x3KQc1U3kRr4ISka8cSMmK/MWoMj5mJu3+55hB/q7XuDkQcywrvU6f2Aq R17SdSC02GBuwQkMPuTH8LPNAB5zbRgh7pYk1KQd9JZtXhl3NVPC1G+yANLluN8NxWG5 3MZt9IN0XrfE2yVjFRwd3oqAJM0MvAz2P0G990smMajAMi+IOlKS01+4mN9gYl4n2bnf OEWKpzu99ILh+UKoiBytZmNh7OiIi7lyHY5+BYWRmtfTZC+jwGskAhy7kzlufGdYBTs+ cOwQ== X-Received: by 10.50.217.167 with SMTP id oz7mr10476889igc.26.1363070658886; Mon, 11 Mar 2013 23:44:18 -0700 (PDT) Received: from fremont.twiddle.net (50-194-63-110-static.hfc.comcastbusiness.net. [50.194.63.110]) by mx.google.com with ESMTPS id wx2sm19571738igb.4.2013.03.11.23.44.15 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 11 Mar 2013 23:44:18 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 11 Mar 2013 23:43:45 -0700 Message-Id: <1363070631-21187-4-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1363070631-21187-1-git-send-email-rth@twiddle.net> References: <1363070631-21187-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:4001:c03::230 Cc: jay.foad@gmail.com Subject: [Qemu-devel] [PATCH v2 3/9] tcg-arm: Allow constant first argument to sub X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This allows the generation of RSB instructions. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index f470caa..7475142 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-target.c @@ -1665,8 +1665,17 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, args[0], args[1], args[2], const_args[2]); break; case INDEX_op_sub_i32: - tcg_out_dat_rIN(s, COND_AL, ARITH_SUB, ARITH_ADD, - args[0], args[1], args[2], const_args[2]); + if (const_args[1]) { + if (const_args[2]) { + tcg_out_movi32(s, COND_AL, args[0], args[1] - args[2]); + } else { + tcg_out_dat_rI(s, COND_AL, ARITH_RSB, + args[0], args[2], args[1], 1); + } + } else { + tcg_out_dat_rIN(s, COND_AL, ARITH_SUB, ARITH_ADD, + args[0], args[1], args[2], const_args[2]); + } break; case INDEX_op_and_i32: tcg_out_dat_rIK(s, COND_AL, ARITH_AND, ARITH_BIC, @@ -1859,7 +1868,7 @@ static const TCGTargetOpDef arm_op_defs[] = { /* TODO: "r", "r", "ri" */ { INDEX_op_add_i32, { "r", "r", "rIN" } }, - { INDEX_op_sub_i32, { "r", "r", "rIN" } }, + { INDEX_op_sub_i32, { "r", "rI", "rIN" } }, { INDEX_op_mul_i32, { "r", "r", "r" } }, { INDEX_op_mulu2_i32, { "r", "r", "r", "r" } }, { INDEX_op_muls2_i32, { "r", "r", "r", "r" } },