From patchwork Mon Mar 11 16:08:06 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 226585 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id D6FBC2C02B2 for ; Tue, 12 Mar 2013 03:11:14 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 521D74A231; Mon, 11 Mar 2013 17:11:08 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id yHbVHofUgvf0; Mon, 11 Mar 2013 17:11:08 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0F8574A233; Mon, 11 Mar 2013 17:10:31 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 007534A1AD for ; Mon, 11 Mar 2013 17:09:17 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id JEvI4D7lUsK9 for ; Mon, 11 Mar 2013 17:09:16 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-gg0-f201.google.com (mail-gg0-f201.google.com [209.85.161.201]) by theia.denx.de (Postfix) with ESMTPS id 076814A1FE for ; Mon, 11 Mar 2013 17:09:00 +0100 (CET) Received: by mail-gg0-f201.google.com with SMTP id l2so394113ggn.4 for ; Mon, 11 Mar 2013 09:08:59 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=0HdxJfLlOubBSth6UC/P4oGu/AwyDokv7o26yMO2rRM=; b=oERXQn0Dw0dIHxQG1x0f8zq9z0O5SuKOwz5VTY/SVwxwQlnj7dKlVdsLqx884YXCgh DS9HVHoIFZyKgOimI1H9exS7wu/V5qcVDk7Vgpe2G/s0p34ti3nPlQ5Pw0sVbbsOFpkz 3o+P7hK+OE3SZHCK2TPkpxe+mehtU/1AH/M2sh/zTh+sg84Z1kDfYWI3ILCyGXLmBLtW HS6kyO2NpW+aJ1gAVX9dPQgHyLOfKdCoJ79FnBBtbxLynbll8r3f7CrAOKhgPeh+jAYz AWf1WHt9+KF/c9rCDSVa88Pp0fOhbNqZbuCjpY4TS2ZbCF45BAin8Echg4jvcPW3d2zX dBVg== X-Received: by 10.236.9.10 with SMTP id 10mr8020063yhs.44.1363018139364; Mon, 11 Mar 2013 09:08:59 -0700 (PDT) Received: from corp2gmr1-2.hot.corp.google.com (corp2gmr1-2.hot.corp.google.com [172.24.189.93]) by gmr-mx.google.com with ESMTPS id k21si1088038yhh.1.2013.03.11.09.08.59 (version=TLSv1.1 cipher=AES128-SHA bits=128/128); Mon, 11 Mar 2013 09:08:59 -0700 (PDT) Received: from kaka.mtv.corp.google.com (kaka.mtv.corp.google.com [172.22.73.79]) by corp2gmr1-2.hot.corp.google.com (Postfix) with ESMTP id 37C995A41D4; Mon, 11 Mar 2013 09:08:59 -0700 (PDT) Received: by kaka.mtv.corp.google.com (Postfix, from userid 121222) id E0321160927; Mon, 11 Mar 2013 09:08:58 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Date: Mon, 11 Mar 2013 09:08:06 -0700 Message-Id: <1363018093-28979-9-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 1.8.1.3 In-Reply-To: <1363018093-28979-1-git-send-email-sjg@chromium.org> References: <1363018093-28979-1-git-send-email-sjg@chromium.org> X-Gm-Message-State: ALoCoQkfneP3odb9Fe7t5aLQc5hzBHw8u1xeyNA0a+dSu5pMgJuo06JjV+MQ+ExOn9HA7vpmTit0iok6N/8y5tGtEidVPm5UfOg36XzEPzvup1LmGWpkqzFGiJeevspqRkwlEW6BAm51KqjQWuOaFjcsgmz89TZ1Zn8Cz3dpNXrBMxzMQAwtDKTk6YBn6V5YDIsUsqRFgBA2 Cc: Graeme Russ , Tom Warren Subject: [U-Boot] [PATCH v2 08/15] sf: Respect maximum SPI write size X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Some SPI flash controllers (e.g. Intel ICH) have a limit on the number of bytes that can be in a write transaction. Support this by breaking the writes into multiple transactions. Signed-off-by: Simon Glass --- Changes in v2: None drivers/mtd/spi/spi_flash.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 17f3d3c..b82011d 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -87,6 +87,9 @@ int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset, for (actual = 0; actual < len; actual += chunk_len) { chunk_len = min(len - actual, page_size - byte_addr); + if (flash->spi->max_write_size) + chunk_len = min(chunk_len, flash->spi->max_write_size); + cmd[1] = page_addr >> 8; cmd[2] = page_addr; cmd[3] = byte_addr; @@ -111,8 +114,11 @@ int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset, if (ret) break; - page_addr++; - byte_addr = 0; + byte_addr += chunk_len; + if (byte_addr == page_size) { + page_addr++; + byte_addr = 0; + } } debug("SF: program %s %zu bytes @ %#x\n",