From patchwork Fri Mar 8 20:06:13 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 226198 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 4D55C2C03C9 for ; Sat, 9 Mar 2013 07:09:08 +1100 (EST) Received: from localhost ([::1]:46657 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UE3bG-0000JM-CQ for incoming@patchwork.ozlabs.org; Fri, 08 Mar 2013 15:09:06 -0500 Received: from eggs.gnu.org ([208.118.235.92]:48271) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UE3aH-000068-1T for qemu-devel@nongnu.org; Fri, 08 Mar 2013 15:08:33 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UE3a6-0000Wi-Gx for qemu-devel@nongnu.org; Fri, 08 Mar 2013 15:08:04 -0500 Received: from cantor2.suse.de ([195.135.220.15]:39304 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UE3a6-0000Vq-6M; Fri, 08 Mar 2013 15:07:54 -0500 Received: from relay1.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 66584A50E4; Fri, 8 Mar 2013 21:07:10 +0100 (CET) From: Alexander Graf To: qemu-devel qemu-devel Date: Fri, 8 Mar 2013 21:06:13 +0100 Message-Id: <1362773228-1747-12-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.6.0.2 In-Reply-To: <1362773228-1747-1-git-send-email-agraf@suse.de> References: <1362773228-1747-1-git-send-email-agraf@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: Blue Swirl , "qemu-ppc@nongnu.org list:PowerPC" , =?utf-8?q?Andreas=20F=C3=A4rber?= , =?utf-8?q?Aur=C3=A9lien=20Jarno?= Subject: [Qemu-devel] [PATCH 11/66] target-ppc: Extract 40x aliases X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Andreas Färber Signed-off-by: Andreas Färber Signed-off-by: Alexander Graf --- target-ppc/translate_init.c | 25 +++++++------------------ 1 files changed, 7 insertions(+), 18 deletions(-) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 6a86e10..8a3cf9f 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -6852,8 +6852,6 @@ enum { CPU_POWERPC_XIPCHIP = xxx, #endif /* PowerPC 403 family */ - /* Generic PowerPC 403 */ -#define CPU_POWERPC_403 CPU_POWERPC_403GC /* PowerPC 403 microcontrollers */ CPU_POWERPC_403GA = 0x00200011, CPU_POWERPC_403GB = 0x00200100, @@ -6863,8 +6861,6 @@ enum { CPU_POWERPC_403GP = xxx, #endif /* PowerPC 405 family */ - /* Generic PowerPC 405 */ -#define CPU_POWERPC_405 CPU_POWERPC_405D4 /* PowerPC 405 cores */ #if 0 CPU_POWERPC_405A3 = xxx, @@ -6906,7 +6902,6 @@ enum { #endif /* PowerPC 405 microcontrolers */ /* XXX: missing 0x200108a0 */ -#define CPU_POWERPC_405CR CPU_POWERPC_405CRc CPU_POWERPC_405CRa = 0x40110041, CPU_POWERPC_405CRb = 0x401100C5, CPU_POWERPC_405CRc = 0x40110145, @@ -6918,7 +6913,6 @@ enum { #if 0 CPU_POWERPC_405FX = xxx, #endif -#define CPU_POWERPC_405GP CPU_POWERPC_405GPd CPU_POWERPC_405GPa = 0x40110000, CPU_POWERPC_405GPb = 0x40110040, CPU_POWERPC_405GPc = 0x40110082, @@ -6979,9 +6973,7 @@ enum { #endif /* Xilinx cores */ CPU_POWERPC_X2VP4 = 0x20010820, -#define CPU_POWERPC_X2VP7 CPU_POWERPC_X2VP4 CPU_POWERPC_X2VP20 = 0x20010860, -#define CPU_POWERPC_X2VP50 CPU_POWERPC_X2VP20 #if 0 CPU_POWERPC_ZL10310 = xxx, #endif @@ -7701,8 +7693,6 @@ static const ppc_def_t ppc_defs[] = { POWERPC_DEF("Xipchip", CPU_POWERPC_XIPCHIP, 401) #endif /* PowerPC 403 family */ - /* Generic PowerPC 403 */ - POWERPC_DEF("403", CPU_POWERPC_403, 403) /* PowerPC 403 microcontrolers */ /* PowerPC 403 GA */ POWERPC_DEF("403GA", CPU_POWERPC_403GA, 403) @@ -7717,8 +7707,6 @@ static const ppc_def_t ppc_defs[] = { POWERPC_DEF("403GP", CPU_POWERPC_403GP, 403) #endif /* PowerPC 405 family */ - /* Generic PowerPC 405 */ - POWERPC_DEF("405", CPU_POWERPC_405, 405) /* PowerPC 405 cores */ #if defined (TODO) /* PowerPC 405 A3 */ @@ -7773,8 +7761,6 @@ static const ppc_def_t ppc_defs[] = { POWERPC_DEF("405F6", CPU_POWERPC_405F6, 405) #endif /* PowerPC 405 microcontrolers */ - /* PowerPC 405 CR */ - POWERPC_DEF("405CR", CPU_POWERPC_405CR, 405) /* PowerPC 405 CRa */ POWERPC_DEF("405CRa", CPU_POWERPC_405CRa, 405) /* PowerPC 405 CRb */ @@ -7793,8 +7779,6 @@ static const ppc_def_t ppc_defs[] = { /* PowerPC 405 FX */ POWERPC_DEF("405FX", CPU_POWERPC_405FX, 405) #endif - /* PowerPC 405 GP */ - POWERPC_DEF("405GP", CPU_POWERPC_405GP, 405) /* PowerPC 405 GPa */ POWERPC_DEF("405GPa", CPU_POWERPC_405GPa, 405) /* PowerPC 405 GPb */ @@ -7880,9 +7864,7 @@ static const ppc_def_t ppc_defs[] = { #endif /* Xilinx PowerPC 405 cores */ POWERPC_DEF("x2vp4", CPU_POWERPC_X2VP4, 405) - POWERPC_DEF("x2vp7", CPU_POWERPC_X2VP7, 405) POWERPC_DEF("x2vp20", CPU_POWERPC_X2VP20, 405) - POWERPC_DEF("x2vp50", CPU_POWERPC_X2VP50, 405) #if defined (TODO) /* Zarlink ZL10310 */ POWERPC_DEF("zl10310", CPU_POWERPC_ZL10310, 405) @@ -9160,6 +9142,13 @@ typedef struct PowerPCCPUAlias { } PowerPCCPUAlias; static const PowerPCCPUAlias ppc_cpu_aliases[] = { + { "403", "403GC" }, + { "405", "405D4" }, + { "405CR", "405CRc" }, + { "405GP", "405GPd" }, + { "x2vp7", "x2vp4" }, + { "x2vp50", "x2vp20" }, + { "RCPU", "MPC5xx" }, /* MPC5xx microcontrollers */ { "MGT560", "MPC5xx" },