Patchwork xio3130: Add map_irq functions

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Submitter Alex Williamson
Date March 7, 2013, 6:29 p.m.
Message ID <20130307182932.22161.62817.stgit@bling.home>
Download mbox | patch
Permalink /patch/225893/
State New
Headers show

Comments

Alex Williamson - March 7, 2013, 6:29 p.m.
Just like root ports, I think these are supposed to be direct mapped.

Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
---
 hw/xio3130_downstream.c |    7 +++++++
 hw/xio3130_upstream.c   |    7 +++++++
 2 files changed, 14 insertions(+)
Michael S. Tsirkin - March 7, 2013, 6:49 p.m.
On Thu, Mar 07, 2013 at 11:29:46AM -0700, Alex Williamson wrote:
> Just like root ports, I think these are supposed to be direct mapped.
> 
> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>

Hmm, very strange. Why not using standard pci bridge logic?
Any idea?

> ---
>  hw/xio3130_downstream.c |    7 +++++++
>  hw/xio3130_upstream.c   |    7 +++++++
>  2 files changed, 14 insertions(+)
> 
> diff --git a/hw/xio3130_downstream.c b/hw/xio3130_downstream.c
> index 7f00bc8..c484770 100644
> --- a/hw/xio3130_downstream.c
> +++ b/hw/xio3130_downstream.c
> @@ -54,6 +54,11 @@ static void xio3130_downstream_reset(DeviceState *qdev)
>      pci_bridge_reset(qdev);
>  }
>  
> +static int xio3130_downstream_map_irq(PCIDevice *pci_dev, int irq_num)
> +{
> +    return irq_num;
> +}
> +
>  static int xio3130_downstream_initfn(PCIDevice *d)
>  {
>      PCIBridge* br = DO_UPCAST(PCIBridge, dev, d);
> @@ -61,6 +66,8 @@ static int xio3130_downstream_initfn(PCIDevice *d)
>      PCIESlot *s = DO_UPCAST(PCIESlot, port, p);
>      int rc;
>  
> +    pci_bridge_map_irq(br, NULL, xio3130_downstream_map_irq);
> +
>      rc = pci_bridge_initfn(d);
>      if (rc < 0) {
>          return rc;
> diff --git a/hw/xio3130_upstream.c b/hw/xio3130_upstream.c
> index 70b15d3..c233a43 100644
> --- a/hw/xio3130_upstream.c
> +++ b/hw/xio3130_upstream.c
> @@ -51,12 +51,19 @@ static void xio3130_upstream_reset(DeviceState *qdev)
>      pcie_cap_deverr_reset(d);
>  }
>  
> +static int xio3130_upstream_map_irq(PCIDevice *pci_dev, int irq_num)
> +{
> +    return irq_num;
> +}
> +
>  static int xio3130_upstream_initfn(PCIDevice *d)
>  {
>      PCIBridge* br = DO_UPCAST(PCIBridge, dev, d);
>      PCIEPort *p = DO_UPCAST(PCIEPort, br, br);
>      int rc;
>  
> +    pci_bridge_map_irq(br, NULL, xio3130_upstream_map_irq);
> +
>      rc = pci_bridge_initfn(d);
>      if (rc < 0) {
>          return rc;
Alex Williamson - March 7, 2013, 7:17 p.m.
On Thu, 2013-03-07 at 20:49 +0200, Michael S. Tsirkin wrote:
> On Thu, Mar 07, 2013 at 11:29:46AM -0700, Alex Williamson wrote:
> > Just like root ports, I think these are supposed to be direct mapped.
> > 
> > Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
> 
> Hmm, very strange. Why not using standard pci bridge logic?
> Any idea?

Where is it supposed to get set for a bridge?  I see:

int pci_bridge_initfn(PCIDevice *dev)
{
...
    sec_bus->map_irq = br->map_irq;

But nobody is calling pci_bridge_map_irq() to set that, so that's what I
added.  Thanks,

Alex

> > ---
> >  hw/xio3130_downstream.c |    7 +++++++
> >  hw/xio3130_upstream.c   |    7 +++++++
> >  2 files changed, 14 insertions(+)
> > 
> > diff --git a/hw/xio3130_downstream.c b/hw/xio3130_downstream.c
> > index 7f00bc8..c484770 100644
> > --- a/hw/xio3130_downstream.c
> > +++ b/hw/xio3130_downstream.c
> > @@ -54,6 +54,11 @@ static void xio3130_downstream_reset(DeviceState *qdev)
> >      pci_bridge_reset(qdev);
> >  }
> >  
> > +static int xio3130_downstream_map_irq(PCIDevice *pci_dev, int irq_num)
> > +{
> > +    return irq_num;
> > +}
> > +
> >  static int xio3130_downstream_initfn(PCIDevice *d)
> >  {
> >      PCIBridge* br = DO_UPCAST(PCIBridge, dev, d);
> > @@ -61,6 +66,8 @@ static int xio3130_downstream_initfn(PCIDevice *d)
> >      PCIESlot *s = DO_UPCAST(PCIESlot, port, p);
> >      int rc;
> >  
> > +    pci_bridge_map_irq(br, NULL, xio3130_downstream_map_irq);
> > +
> >      rc = pci_bridge_initfn(d);
> >      if (rc < 0) {
> >          return rc;
> > diff --git a/hw/xio3130_upstream.c b/hw/xio3130_upstream.c
> > index 70b15d3..c233a43 100644
> > --- a/hw/xio3130_upstream.c
> > +++ b/hw/xio3130_upstream.c
> > @@ -51,12 +51,19 @@ static void xio3130_upstream_reset(DeviceState *qdev)
> >      pcie_cap_deverr_reset(d);
> >  }
> >  
> > +static int xio3130_upstream_map_irq(PCIDevice *pci_dev, int irq_num)
> > +{
> > +    return irq_num;
> > +}
> > +
> >  static int xio3130_upstream_initfn(PCIDevice *d)
> >  {
> >      PCIBridge* br = DO_UPCAST(PCIBridge, dev, d);
> >      PCIEPort *p = DO_UPCAST(PCIEPort, br, br);
> >      int rc;
> >  
> > +    pci_bridge_map_irq(br, NULL, xio3130_upstream_map_irq);
> > +
> >      rc = pci_bridge_initfn(d);
> >      if (rc < 0) {
> >          return rc;
Michael S. Tsirkin - March 7, 2013, 7:22 p.m.
On Thu, Mar 07, 2013 at 12:17:11PM -0700, Alex Williamson wrote:
> On Thu, 2013-03-07 at 20:49 +0200, Michael S. Tsirkin wrote:
> > On Thu, Mar 07, 2013 at 11:29:46AM -0700, Alex Williamson wrote:
> > > Just like root ports, I think these are supposed to be direct mapped.
> > > 
> > > Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
> > 
> > Hmm, very strange. Why not using standard pci bridge logic?
> > Any idea?
> 
> Where is it supposed to get set for a bridge?  I see:
> 
> int pci_bridge_initfn(PCIDevice *dev)
> {
> ...
>     sec_bus->map_irq = br->map_irq;
> 
> But nobody is calling pci_bridge_map_irq() to set that, so that's what I
> added.  Thanks,
> 
> Alex

Yes but shouldn't this be using standard PCI mapping,
like pci_bridge_dev_map_irq_fn in pci_bridge_dev?

We really should make it the default if nothing is set ...

> > > ---
> > >  hw/xio3130_downstream.c |    7 +++++++
> > >  hw/xio3130_upstream.c   |    7 +++++++
> > >  2 files changed, 14 insertions(+)
> > > 
> > > diff --git a/hw/xio3130_downstream.c b/hw/xio3130_downstream.c
> > > index 7f00bc8..c484770 100644
> > > --- a/hw/xio3130_downstream.c
> > > +++ b/hw/xio3130_downstream.c
> > > @@ -54,6 +54,11 @@ static void xio3130_downstream_reset(DeviceState *qdev)
> > >      pci_bridge_reset(qdev);
> > >  }
> > >  
> > > +static int xio3130_downstream_map_irq(PCIDevice *pci_dev, int irq_num)
> > > +{
> > > +    return irq_num;
> > > +}
> > > +
> > >  static int xio3130_downstream_initfn(PCIDevice *d)
> > >  {
> > >      PCIBridge* br = DO_UPCAST(PCIBridge, dev, d);
> > > @@ -61,6 +66,8 @@ static int xio3130_downstream_initfn(PCIDevice *d)
> > >      PCIESlot *s = DO_UPCAST(PCIESlot, port, p);
> > >      int rc;
> > >  
> > > +    pci_bridge_map_irq(br, NULL, xio3130_downstream_map_irq);
> > > +
> > >      rc = pci_bridge_initfn(d);
> > >      if (rc < 0) {
> > >          return rc;
> > > diff --git a/hw/xio3130_upstream.c b/hw/xio3130_upstream.c
> > > index 70b15d3..c233a43 100644
> > > --- a/hw/xio3130_upstream.c
> > > +++ b/hw/xio3130_upstream.c
> > > @@ -51,12 +51,19 @@ static void xio3130_upstream_reset(DeviceState *qdev)
> > >      pcie_cap_deverr_reset(d);
> > >  }
> > >  
> > > +static int xio3130_upstream_map_irq(PCIDevice *pci_dev, int irq_num)
> > > +{
> > > +    return irq_num;
> > > +}
> > > +
> > >  static int xio3130_upstream_initfn(PCIDevice *d)
> > >  {
> > >      PCIBridge* br = DO_UPCAST(PCIBridge, dev, d);
> > >      PCIEPort *p = DO_UPCAST(PCIEPort, br, br);
> > >      int rc;
> > >  
> > > +    pci_bridge_map_irq(br, NULL, xio3130_upstream_map_irq);
> > > +
> > >      rc = pci_bridge_initfn(d);
> > >      if (rc < 0) {
> > >          return rc;
> 
>
Alex Williamson - March 7, 2013, 7:31 p.m.
On Thu, 2013-03-07 at 21:22 +0200, Michael S. Tsirkin wrote:
> On Thu, Mar 07, 2013 at 12:17:11PM -0700, Alex Williamson wrote:
> > On Thu, 2013-03-07 at 20:49 +0200, Michael S. Tsirkin wrote:
> > > On Thu, Mar 07, 2013 at 11:29:46AM -0700, Alex Williamson wrote:
> > > > Just like root ports, I think these are supposed to be direct mapped.
> > > > 
> > > > Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
> > > 
> > > Hmm, very strange. Why not using standard pci bridge logic?
> > > Any idea?
> > 
> > Where is it supposed to get set for a bridge?  I see:
> > 
> > int pci_bridge_initfn(PCIDevice *dev)
> > {
> > ...
> >     sec_bus->map_irq = br->map_irq;
> > 
> > But nobody is calling pci_bridge_map_irq() to set that, so that's what I
> > added.  Thanks,
> > 
> > Alex
> 
> Yes but shouldn't this be using standard PCI mapping,
> like pci_bridge_dev_map_irq_fn in pci_bridge_dev?
> 
> We really should make it the default if nothing is set ...

Ok, I'll try using that if not set, the swizzle may well be the correct
function.  I take it you haven't applied the ioh3420 patch doing the
same yet then either?  Thanks,

Alex

> > > > ---
> > > >  hw/xio3130_downstream.c |    7 +++++++
> > > >  hw/xio3130_upstream.c   |    7 +++++++
> > > >  2 files changed, 14 insertions(+)
> > > > 
> > > > diff --git a/hw/xio3130_downstream.c b/hw/xio3130_downstream.c
> > > > index 7f00bc8..c484770 100644
> > > > --- a/hw/xio3130_downstream.c
> > > > +++ b/hw/xio3130_downstream.c
> > > > @@ -54,6 +54,11 @@ static void xio3130_downstream_reset(DeviceState *qdev)
> > > >      pci_bridge_reset(qdev);
> > > >  }
> > > >  
> > > > +static int xio3130_downstream_map_irq(PCIDevice *pci_dev, int irq_num)
> > > > +{
> > > > +    return irq_num;
> > > > +}
> > > > +
> > > >  static int xio3130_downstream_initfn(PCIDevice *d)
> > > >  {
> > > >      PCIBridge* br = DO_UPCAST(PCIBridge, dev, d);
> > > > @@ -61,6 +66,8 @@ static int xio3130_downstream_initfn(PCIDevice *d)
> > > >      PCIESlot *s = DO_UPCAST(PCIESlot, port, p);
> > > >      int rc;
> > > >  
> > > > +    pci_bridge_map_irq(br, NULL, xio3130_downstream_map_irq);
> > > > +
> > > >      rc = pci_bridge_initfn(d);
> > > >      if (rc < 0) {
> > > >          return rc;
> > > > diff --git a/hw/xio3130_upstream.c b/hw/xio3130_upstream.c
> > > > index 70b15d3..c233a43 100644
> > > > --- a/hw/xio3130_upstream.c
> > > > +++ b/hw/xio3130_upstream.c
> > > > @@ -51,12 +51,19 @@ static void xio3130_upstream_reset(DeviceState *qdev)
> > > >      pcie_cap_deverr_reset(d);
> > > >  }
> > > >  
> > > > +static int xio3130_upstream_map_irq(PCIDevice *pci_dev, int irq_num)
> > > > +{
> > > > +    return irq_num;
> > > > +}
> > > > +
> > > >  static int xio3130_upstream_initfn(PCIDevice *d)
> > > >  {
> > > >      PCIBridge* br = DO_UPCAST(PCIBridge, dev, d);
> > > >      PCIEPort *p = DO_UPCAST(PCIEPort, br, br);
> > > >      int rc;
> > > >  
> > > > +    pci_bridge_map_irq(br, NULL, xio3130_upstream_map_irq);
> > > > +
> > > >      rc = pci_bridge_initfn(d);
> > > >      if (rc < 0) {
> > > >          return rc;
> > 
> >
Michael S. Tsirkin - March 7, 2013, 8:31 p.m.
On Thu, Mar 07, 2013 at 12:31:00PM -0700, Alex Williamson wrote:
> On Thu, 2013-03-07 at 21:22 +0200, Michael S. Tsirkin wrote:
> > On Thu, Mar 07, 2013 at 12:17:11PM -0700, Alex Williamson wrote:
> > > On Thu, 2013-03-07 at 20:49 +0200, Michael S. Tsirkin wrote:
> > > > On Thu, Mar 07, 2013 at 11:29:46AM -0700, Alex Williamson wrote:
> > > > > Just like root ports, I think these are supposed to be direct mapped.
> > > > > 
> > > > > Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
> > > > 
> > > > Hmm, very strange. Why not using standard pci bridge logic?
> > > > Any idea?
> > > 
> > > Where is it supposed to get set for a bridge?  I see:
> > > 
> > > int pci_bridge_initfn(PCIDevice *dev)
> > > {
> > > ...
> > >     sec_bus->map_irq = br->map_irq;
> > > 
> > > But nobody is calling pci_bridge_map_irq() to set that, so that's what I
> > > added.  Thanks,
> > > 
> > > Alex
> > 
> > Yes but shouldn't this be using standard PCI mapping,
> > like pci_bridge_dev_map_irq_fn in pci_bridge_dev?
> > 
> > We really should make it the default if nothing is set ...
> 
> Ok, I'll try using that if not set, the swizzle may well be the correct
> function.  I take it you haven't applied the ioh3420 patch doing the
> same yet then either?  Thanks,
> 
> Alex

Nope.

> > > > > ---
> > > > >  hw/xio3130_downstream.c |    7 +++++++
> > > > >  hw/xio3130_upstream.c   |    7 +++++++
> > > > >  2 files changed, 14 insertions(+)
> > > > > 
> > > > > diff --git a/hw/xio3130_downstream.c b/hw/xio3130_downstream.c
> > > > > index 7f00bc8..c484770 100644
> > > > > --- a/hw/xio3130_downstream.c
> > > > > +++ b/hw/xio3130_downstream.c
> > > > > @@ -54,6 +54,11 @@ static void xio3130_downstream_reset(DeviceState *qdev)
> > > > >      pci_bridge_reset(qdev);
> > > > >  }
> > > > >  
> > > > > +static int xio3130_downstream_map_irq(PCIDevice *pci_dev, int irq_num)
> > > > > +{
> > > > > +    return irq_num;
> > > > > +}
> > > > > +
> > > > >  static int xio3130_downstream_initfn(PCIDevice *d)
> > > > >  {
> > > > >      PCIBridge* br = DO_UPCAST(PCIBridge, dev, d);
> > > > > @@ -61,6 +66,8 @@ static int xio3130_downstream_initfn(PCIDevice *d)
> > > > >      PCIESlot *s = DO_UPCAST(PCIESlot, port, p);
> > > > >      int rc;
> > > > >  
> > > > > +    pci_bridge_map_irq(br, NULL, xio3130_downstream_map_irq);
> > > > > +
> > > > >      rc = pci_bridge_initfn(d);
> > > > >      if (rc < 0) {
> > > > >          return rc;
> > > > > diff --git a/hw/xio3130_upstream.c b/hw/xio3130_upstream.c
> > > > > index 70b15d3..c233a43 100644
> > > > > --- a/hw/xio3130_upstream.c
> > > > > +++ b/hw/xio3130_upstream.c
> > > > > @@ -51,12 +51,19 @@ static void xio3130_upstream_reset(DeviceState *qdev)
> > > > >      pcie_cap_deverr_reset(d);
> > > > >  }
> > > > >  
> > > > > +static int xio3130_upstream_map_irq(PCIDevice *pci_dev, int irq_num)
> > > > > +{
> > > > > +    return irq_num;
> > > > > +}
> > > > > +
> > > > >  static int xio3130_upstream_initfn(PCIDevice *d)
> > > > >  {
> > > > >      PCIBridge* br = DO_UPCAST(PCIBridge, dev, d);
> > > > >      PCIEPort *p = DO_UPCAST(PCIEPort, br, br);
> > > > >      int rc;
> > > > >  
> > > > > +    pci_bridge_map_irq(br, NULL, xio3130_upstream_map_irq);
> > > > > +
> > > > >      rc = pci_bridge_initfn(d);
> > > > >      if (rc < 0) {
> > > > >          return rc;
> > > 
> > > 
> 
>

Patch

diff --git a/hw/xio3130_downstream.c b/hw/xio3130_downstream.c
index 7f00bc8..c484770 100644
--- a/hw/xio3130_downstream.c
+++ b/hw/xio3130_downstream.c
@@ -54,6 +54,11 @@  static void xio3130_downstream_reset(DeviceState *qdev)
     pci_bridge_reset(qdev);
 }
 
+static int xio3130_downstream_map_irq(PCIDevice *pci_dev, int irq_num)
+{
+    return irq_num;
+}
+
 static int xio3130_downstream_initfn(PCIDevice *d)
 {
     PCIBridge* br = DO_UPCAST(PCIBridge, dev, d);
@@ -61,6 +66,8 @@  static int xio3130_downstream_initfn(PCIDevice *d)
     PCIESlot *s = DO_UPCAST(PCIESlot, port, p);
     int rc;
 
+    pci_bridge_map_irq(br, NULL, xio3130_downstream_map_irq);
+
     rc = pci_bridge_initfn(d);
     if (rc < 0) {
         return rc;
diff --git a/hw/xio3130_upstream.c b/hw/xio3130_upstream.c
index 70b15d3..c233a43 100644
--- a/hw/xio3130_upstream.c
+++ b/hw/xio3130_upstream.c
@@ -51,12 +51,19 @@  static void xio3130_upstream_reset(DeviceState *qdev)
     pcie_cap_deverr_reset(d);
 }
 
+static int xio3130_upstream_map_irq(PCIDevice *pci_dev, int irq_num)
+{
+    return irq_num;
+}
+
 static int xio3130_upstream_initfn(PCIDevice *d)
 {
     PCIBridge* br = DO_UPCAST(PCIBridge, dev, d);
     PCIEPort *p = DO_UPCAST(PCIEPort, br, br);
     int rc;
 
+    pci_bridge_map_irq(br, NULL, xio3130_upstream_map_irq);
+
     rc = pci_bridge_initfn(d);
     if (rc < 0) {
         return rc;