From patchwork Wed Mar 6 07:27:24 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuo-Jung Su X-Patchwork-Id: 225438 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 619512C03A2 for ; Wed, 6 Mar 2013 19:37:01 +1100 (EST) Received: from localhost ([::1]:41862 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UD8pm-0002LF-LB for incoming@patchwork.ozlabs.org; Wed, 06 Mar 2013 02:32:18 -0500 Received: from eggs.gnu.org ([208.118.235.92]:57718) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UD8m8-0005LO-Jb for qemu-devel@nongnu.org; Wed, 06 Mar 2013 02:28:35 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UD8m5-00032y-BK for qemu-devel@nongnu.org; Wed, 06 Mar 2013 02:28:32 -0500 Received: from mail-ie0-x22b.google.com ([2607:f8b0:4001:c03::22b]:37892) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UD8m5-00032s-6x for qemu-devel@nongnu.org; Wed, 06 Mar 2013 02:28:29 -0500 Received: by mail-ie0-f171.google.com with SMTP id 10so9012363ied.2 for ; Tue, 05 Mar 2013 23:28:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=jyRI+mk+rDHpjhji2ZCc0GehvRb1PXkusMy+G9YX7uU=; b=BppW0qCGHaT7jglG7xiKyZ9NkLQkek+LKOQAhF/MAWhI/nLS0Ikj41vAflWaGzbsOk TbnO5Y1XJuKKOTXSdlT9d7LP0Ug9BFOAV2vduRn9vVQpY5l/2RWcFdJhlVzBBrDqCG5B KqkNoD2RFlWUTxZjR4V6w/ZRrtvxMtzbGCjIIyCtVD1Qta8JkQYUbD4kPn62cgYIdoi2 xl1D3oBljwhGYNtznEJ39j2O167sOJl47RtiK80ontAeVlqqAAkwlp6MvPFUDagr8mP/ KkzdoU4EqLVzeUxJO45h5YnXps8LJvGI+/dA3GlBvcQsHey/ts5V39+fUGxrrt/C6v9F tvPg== X-Received: by 10.50.194.164 with SMTP id hx4mr9615367igc.35.1362554908766; Tue, 05 Mar 2013 23:28:28 -0800 (PST) Received: from localhost.localdomain ([220.132.37.35]) by mx.google.com with ESMTPS id ew5sm22823374igc.2.2013.03.05.23.28.25 (version=TLSv1 cipher=DES-CBC3-SHA bits=168/168); Tue, 05 Mar 2013 23:28:28 -0800 (PST) From: Kuo-Jung Su To: qemu-devel@nongnu.org Date: Wed, 6 Mar 2013 15:27:24 +0800 Message-Id: <1362554857-3896-12-git-send-email-dantesu@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1362554857-3896-1-git-send-email-dantesu@gmail.com> References: <1362554857-3896-1-git-send-email-dantesu@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:4001:c03::22b Cc: Peter Maydell , i.mitsyanko@samsung.com, Blue Swirl , Kuo-Jung Su , Paul Brook , Andreas , fred.konrad@greensocs.com Subject: [Qemu-devel] [PATCH v6 11/24] hw/nand.c: correct the sense of the BUSY/READY status bit X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The BIT6 of Status Register(SR): SR[6] behaves the same as R/B# pin SR[6] = 0 indicates the device is busy; SR[6] = 1 means the device is ready Some NAND flash controller (i.e. ftnandc021) relies on the SR[6] to determine if the NAND flash erase/program is success or error timeout. P.S: The exmaple NAND flash datasheet could be found at following link: http://www.mxic.com.tw/QuickPlace/hq/PageLibrary4825740B00298A3B.nsf/h_Index/8FEA549237D2F7674825795800104C26/$File/MX30LF1G08AA,%203V,%201Gb,%20v1.1.pdf Signed-off-by: Kuo-Jung Su Reviewed-by: Peter Crosthwaite --- hw/nand.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/nand.c b/hw/nand.c index 4a71265..61e918f 100644 --- a/hw/nand.c +++ b/hw/nand.c @@ -46,7 +46,7 @@ # define NAND_IOSTATUS_PLANE1 (1 << 2) # define NAND_IOSTATUS_PLANE2 (1 << 3) # define NAND_IOSTATUS_PLANE3 (1 << 4) -# define NAND_IOSTATUS_BUSY (1 << 6) +# define NAND_IOSTATUS_READY (1 << 6) # define NAND_IOSTATUS_UNPROTCT (1 << 7) # define MAX_PAGE 0x800 @@ -231,6 +231,7 @@ static void nand_reset(DeviceState *dev) s->iolen = 0; s->offset = 0; s->status &= NAND_IOSTATUS_UNPROTCT; + s->status |= NAND_IOSTATUS_READY; } static inline void nand_pushio_byte(NANDFlashState *s, uint8_t value)