Patchwork [v6,11/24] hw/nand.c: correct the sense of the BUSY/READY status bit

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Submitter Kuo-Jung Su
Date March 6, 2013, 7:27 a.m.
Message ID <1362554857-3896-12-git-send-email-dantesu@gmail.com>
Download mbox | patch
Permalink /patch/225438/
State New
Headers show

Comments

Kuo-Jung Su - March 6, 2013, 7:27 a.m.
The BIT6 of Status Register(SR):

SR[6] behaves the same as R/B# pin
    SR[6] = 0 indicates the device is busy;
    SR[6] = 1 means the device is ready

Some NAND flash controller (i.e. ftnandc021) relies on the SR[6]
to determine if the NAND flash erase/program is success or error timeout.

P.S:
The exmaple NAND flash datasheet could be found at following link:
http://www.mxic.com.tw/QuickPlace/hq/PageLibrary4825740B00298A3B.nsf/h_Index/8FEA549237D2F7674825795800104C26/$File/MX30LF1G08AA,%203V,%201Gb,%20v1.1.pdf

Signed-off-by: Kuo-Jung Su <dantesu@gmail.com>
---
 hw/nand.c |    3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
Peter Crosthwaite - March 7, 2013, 2:11 a.m.
Hi Kuo Jung, Peter,

This patch fixes bugs for us in Zynq Nand (cc Wendy Liang). Can we get
a cherry pick of this?

Regards,
Peter

On Wed, Mar 6, 2013 at 5:27 PM, Kuo-Jung Su <dantesu@gmail.com> wrote:
> The BIT6 of Status Register(SR):
>
> SR[6] behaves the same as R/B# pin
>     SR[6] = 0 indicates the device is busy;
>     SR[6] = 1 means the device is ready
>
> Some NAND flash controller (i.e. ftnandc021) relies on the SR[6]
> to determine if the NAND flash erase/program is success or error timeout.
>
> P.S:
> The exmaple NAND flash datasheet could be found at following link:
> http://www.mxic.com.tw/QuickPlace/hq/PageLibrary4825740B00298A3B.nsf/h_Index/8FEA549237D2F7674825795800104C26/$File/MX30LF1G08AA,%203V,%201Gb,%20v1.1.pdf
>
> Signed-off-by: Kuo-Jung Su <dantesu@gmail.com>

Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>

> ---
>  hw/nand.c |    3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/hw/nand.c b/hw/nand.c
> index 4a71265..61e918f 100644
> --- a/hw/nand.c
> +++ b/hw/nand.c
> @@ -46,7 +46,7 @@
>  # define NAND_IOSTATUS_PLANE1  (1 << 2)
>  # define NAND_IOSTATUS_PLANE2  (1 << 3)
>  # define NAND_IOSTATUS_PLANE3  (1 << 4)
> -# define NAND_IOSTATUS_BUSY    (1 << 6)
> +# define NAND_IOSTATUS_READY    (1 << 6)
>  # define NAND_IOSTATUS_UNPROTCT        (1 << 7)
>
>  # define MAX_PAGE              0x800
> @@ -231,6 +231,7 @@ static void nand_reset(DeviceState *dev)
>      s->iolen = 0;
>      s->offset = 0;
>      s->status &= NAND_IOSTATUS_UNPROTCT;
> +    s->status |= NAND_IOSTATUS_READY;
>  }
>
>  static inline void nand_pushio_byte(NANDFlashState *s, uint8_t value)
> --
> 1.7.9.5
>
>
Kuo-Jung Su - March 7, 2013, 3:40 a.m.
2013/3/7 Peter Crosthwaite <peter.crosthwaite@xilinx.com>:
> Hi Kuo Jung, Peter,
>
> This patch fixes bugs for us in Zynq Nand (cc Wendy Liang). Can we get
> a cherry pick of this?
>

Why not? Please go ahead.

> Regards,
> Peter
>
> On Wed, Mar 6, 2013 at 5:27 PM, Kuo-Jung Su <dantesu@gmail.com> wrote:
>> The BIT6 of Status Register(SR):
>>
>> SR[6] behaves the same as R/B# pin
>>     SR[6] = 0 indicates the device is busy;
>>     SR[6] = 1 means the device is ready
>>
>> Some NAND flash controller (i.e. ftnandc021) relies on the SR[6]
>> to determine if the NAND flash erase/program is success or error timeout.
>>
>> P.S:
>> The exmaple NAND flash datasheet could be found at following link:
>> http://www.mxic.com.tw/QuickPlace/hq/PageLibrary4825740B00298A3B.nsf/h_Index/8FEA549237D2F7674825795800104C26/$File/MX30LF1G08AA,%203V,%201Gb,%20v1.1.pdf
>>
>> Signed-off-by: Kuo-Jung Su <dantesu@gmail.com>
>
> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
>
>> ---
>>  hw/nand.c |    3 ++-
>>  1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/hw/nand.c b/hw/nand.c
>> index 4a71265..61e918f 100644
>> --- a/hw/nand.c
>> +++ b/hw/nand.c
>> @@ -46,7 +46,7 @@
>>  # define NAND_IOSTATUS_PLANE1  (1 << 2)
>>  # define NAND_IOSTATUS_PLANE2  (1 << 3)
>>  # define NAND_IOSTATUS_PLANE3  (1 << 4)
>> -# define NAND_IOSTATUS_BUSY    (1 << 6)
>> +# define NAND_IOSTATUS_READY    (1 << 6)
>>  # define NAND_IOSTATUS_UNPROTCT        (1 << 7)
>>
>>  # define MAX_PAGE              0x800
>> @@ -231,6 +231,7 @@ static void nand_reset(DeviceState *dev)
>>      s->iolen = 0;
>>      s->offset = 0;
>>      s->status &= NAND_IOSTATUS_UNPROTCT;
>> +    s->status |= NAND_IOSTATUS_READY;
>>  }
>>
>>  static inline void nand_pushio_byte(NANDFlashState *s, uint8_t value)
>> --
>> 1.7.9.5
>>
>>



--
Best wishes,
Kuo-Jung Su
Edgar Iglesias - March 7, 2013, 8:37 a.m.
On Thu, Mar 07, 2013 at 12:11:51PM +1000, Peter Crosthwaite wrote:
> Hi Kuo Jung, Peter,
> 
> This patch fixes bugs for us in Zynq Nand (cc Wendy Liang). Can we get
> a cherry pick of this?

I've applied this one.

Thanks,
Edgar


> 
> Regards,
> Peter
> 
> On Wed, Mar 6, 2013 at 5:27 PM, Kuo-Jung Su <dantesu@gmail.com> wrote:
> > The BIT6 of Status Register(SR):
> >
> > SR[6] behaves the same as R/B# pin
> >     SR[6] = 0 indicates the device is busy;
> >     SR[6] = 1 means the device is ready
> >
> > Some NAND flash controller (i.e. ftnandc021) relies on the SR[6]
> > to determine if the NAND flash erase/program is success or error timeout.
> >
> > P.S:
> > The exmaple NAND flash datasheet could be found at following link:
> > http://www.mxic.com.tw/QuickPlace/hq/PageLibrary4825740B00298A3B.nsf/h_Index/8FEA549237D2F7674825795800104C26/$File/MX30LF1G08AA,%203V,%201Gb,%20v1.1.pdf
> >
> > Signed-off-by: Kuo-Jung Su <dantesu@gmail.com>
> 
> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
> 
> > ---
> >  hw/nand.c |    3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/hw/nand.c b/hw/nand.c
> > index 4a71265..61e918f 100644
> > --- a/hw/nand.c
> > +++ b/hw/nand.c
> > @@ -46,7 +46,7 @@
> >  # define NAND_IOSTATUS_PLANE1  (1 << 2)
> >  # define NAND_IOSTATUS_PLANE2  (1 << 3)
> >  # define NAND_IOSTATUS_PLANE3  (1 << 4)
> > -# define NAND_IOSTATUS_BUSY    (1 << 6)
> > +# define NAND_IOSTATUS_READY    (1 << 6)
> >  # define NAND_IOSTATUS_UNPROTCT        (1 << 7)
> >
> >  # define MAX_PAGE              0x800
> > @@ -231,6 +231,7 @@ static void nand_reset(DeviceState *dev)
> >      s->iolen = 0;
> >      s->offset = 0;
> >      s->status &= NAND_IOSTATUS_UNPROTCT;
> > +    s->status |= NAND_IOSTATUS_READY;
> >  }
> >
> >  static inline void nand_pushio_byte(NANDFlashState *s, uint8_t value)
> > --
> > 1.7.9.5
> >
> >

Patch

diff --git a/hw/nand.c b/hw/nand.c
index 4a71265..61e918f 100644
--- a/hw/nand.c
+++ b/hw/nand.c
@@ -46,7 +46,7 @@ 
 # define NAND_IOSTATUS_PLANE1	(1 << 2)
 # define NAND_IOSTATUS_PLANE2	(1 << 3)
 # define NAND_IOSTATUS_PLANE3	(1 << 4)
-# define NAND_IOSTATUS_BUSY	(1 << 6)
+# define NAND_IOSTATUS_READY    (1 << 6)
 # define NAND_IOSTATUS_UNPROTCT	(1 << 7)
 
 # define MAX_PAGE		0x800
@@ -231,6 +231,7 @@  static void nand_reset(DeviceState *dev)
     s->iolen = 0;
     s->offset = 0;
     s->status &= NAND_IOSTATUS_UNPROTCT;
+    s->status |= NAND_IOSTATUS_READY;
 }
 
 static inline void nand_pushio_byte(NANDFlashState *s, uint8_t value)