From patchwork Tue Mar 5 19:00:55 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 225165 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 6E8852C0317 for ; Wed, 6 Mar 2013 06:01:46 +1100 (EST) Received: from localhost ([::1]:39253 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UCx7Q-0003Fx-Dj for incoming@patchwork.ozlabs.org; Tue, 05 Mar 2013 14:01:44 -0500 Received: from eggs.gnu.org ([208.118.235.92]:34203) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UCx75-0003FM-Ci for qemu-devel@nongnu.org; Tue, 05 Mar 2013 14:01:24 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UCx73-0005ft-Ul for qemu-devel@nongnu.org; Tue, 05 Mar 2013 14:01:23 -0500 Received: from mail-qa0-f49.google.com ([209.85.216.49]:59322) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UCx73-0005fj-RK for qemu-devel@nongnu.org; Tue, 05 Mar 2013 14:01:21 -0500 Received: by mail-qa0-f49.google.com with SMTP id o13so2111404qaj.1 for ; Tue, 05 Mar 2013 11:01:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=2hH0oynZC2eMibcLTZiuSAYnJfSUD3XWsNJOq5913mY=; b=JT1kliGdbpT89EAC9sNCjp5vfbwZUslyTmhJhpL1iDpmJhzIx1Oi+CihyEGoAViksE 7OeW0DPfqccjZUGPR7FvBgEukhDw2wwV/wbMzYnO+/v4wWavmlwmupRjGMUEGbYFt+LV ZQP+oZKBbfL/7SYnrwbE2q2T6syDNhbO3eW/GIdm4Kb3yy9Jwe8PbsrjfOV3LlrNHeUX J6MZvh2zgpc2O5Zej4KyayQpY+ADZpR8mN9yst4dAlXbr27NInQ9MeleIiMPBbxrCwwt Hf4gE5UUHx1NhaIG9uAwG8KeZjozKdvKaE6hb2ZNDOpXQ/2LJN0/NdkSHpZmatrsCCsl zE3A== X-Received: by 10.49.81.240 with SMTP id d16mr40318730qey.26.1362510081417; Tue, 05 Mar 2013 11:01:21 -0800 (PST) Received: from yakj.usersys.redhat.com (93-34-176-20.ip50.fastwebnet.it. [93.34.176.20]) by mx.google.com with ESMTPS id q6sm3030192qeu.1.2013.03.05.11.01.19 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 05 Mar 2013 11:01:21 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Date: Tue, 5 Mar 2013 20:00:55 +0100 Message-Id: <1362510056-3316-3-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1362510056-3316-1-git-send-email-pbonzini@redhat.com> References: <1362510056-3316-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 209.85.216.49 Cc: dwmw2@infradead.org, aliguori@us.ibm.com, lersek@redhat.com, afaerber@suse.de Subject: [Qemu-devel] [PATCH v2 2/3] pc: port 92 reset requires a low->high transition X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The PIIX datasheet says that "before another INIT pulse can be generated via [port 92h], [bit 0] must be written back to a zero. This bug is masked right now because a full reset will clear the value of port 92h. But once we implement soft reset correctly, the next attempt to enable the A20 line by setting bit 1 (and leaving the others untouched) will cause another reset. Signed-off-by: Paolo Bonzini --- hw/pc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/pc.c b/hw/pc.c index 37f6b52..3e1cf2e 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -437,11 +437,12 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) { Port92State *s = opaque; + int oldval = s->outport; DPRINTF("port92: write 0x%02x\n", val); s->outport = val; qemu_set_irq(*s->a20_out, (val >> 1) & 1); - if (val & 1) { + if ((val & 1) && !(oldval & 1)) { qemu_system_reset_request(); } }