From patchwork Tue Mar 5 01:12:00 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [02/13] target-arm: Don't decode RFE or SRS on M profile cores Date: Mon, 04 Mar 2013 15:12:00 -0000 From: Peter Maydell X-Patchwork-Id: 224904 Message-Id: <1362445931-4383-3-git-send-email-peter.maydell@linaro.org> To: Aurelien Jarno , Blue Swirl Cc: Anthony Liguori , qemu-devel@nongnu.org, Paul Brook M profile cores do not have the RFE or SRS instructions, so correctly UNDEF these insn patterns on those cores. Signed-off-by: Peter Maydell --- target-arm/translate.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index e16c113..35a21be 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -8180,9 +8180,10 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw } else { /* Load/store multiple, RFE, SRS. */ if (((insn >> 23) & 1) == ((insn >> 24) & 1)) { - /* Not available in user mode. */ - if (IS_USER(s)) + /* RFE, SRS: not available in user mode or on M profile */ + if (IS_USER(s) || IS_M(env)) { goto illegal_op; + } if (insn & (1 << 20)) { /* rfe */ addr = load_reg(s, rn);