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[01/12] mtd: nand_ids: minor clean-ups

Message ID 1362415349-7107-2-git-send-email-dedekind1@gmail.com
State New, archived
Headers show

Commit Message

Artem Bityutskiy March 4, 2013, 4:42 p.m. UTC 
From: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>

Clean-up the code a little bit:
  * clean-up commentaries.
  * move macro definitions to the top of the file.

Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
---
 drivers/mtd/nand/nand_ids.c |   26 ++++++++++++--------------
 1 file changed, 12 insertions(+), 14 deletions(-)

Comments

Brian Norris March 4, 2013, 6:36 p.m. UTC | #1 
On Mon, Mar 4, 2013 at 8:42 AM, Artem Bityutskiy <dedekind1@gmail.com> wrote:
> diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c
> index e3aa274..b110742 100644
> --- a/drivers/mtd/nand/nand_ids.c
> +++ b/drivers/mtd/nand/nand_ids.c
> @@ -10,17 +10,17 @@
>   */
>  #include <linux/module.h>
>  #include <linux/mtd/nand.h>
> +
> +#define LP_OPTIONS NAND_SAMSUNG_LP_OPTIONS
> +#define LP_OPTIONS16 (LP_OPTIONS | NAND_BUSWIDTH_16)
> +
>  /*
> -*      Chip ID list
> -*
> -*      Name. ID code, pagesize, chipsize in MegaByte, eraseblock size,
> -*      options
> -*
> -*      Pagesize; 0, 256, 512
> -*      0       get this information from the extended chip ID
> -+      256     256 Byte page size
> -*      512     512 Byte page size
> -*/
> + * The chip ID list:
> + *    name, device ID, page size, chip size in MiB, eraseblock size, options
> + *
> + * If page size and eraseblock size is 0, the sizes are taken from the extended

Grammar correction: "is" should be "are".

> + * chip ID.
> + */
>  struct nand_flash_dev nand_flash_ids[] = {
>
>  #ifdef CONFIG_MTD_NAND_MUSEUM_IDS
> @@ -67,11 +67,9 @@ struct nand_flash_dev nand_flash_ids[] = {
>         {"NAND 256MiB 3,3V 8-bit",      0x71, 512, 256, 0x4000, 0},
>
>         /*
> -        * These are the new chips with large page size. The pagesize and the
> -        * erasesize is determined from the extended id bytes

The original form has incorrect grammar; "is" should be "are".

> +        * These are the new chips with large page size, page size and
> +        * eraseblock size is determined from the extended id bytes.

This is also incorrect grammar. It uses a comma to divide sentences
and also uses "is". I would write something like this:

"These are the new chips with large page size. Their page size and
eraseblock size are determined from the extended ID bytes."

>          */
> -#define LP_OPTIONS NAND_SAMSUNG_LP_OPTIONS
> -#define LP_OPTIONS16 (LP_OPTIONS | NAND_BUSWIDTH_16)
>
>         /* 512 Megabit */
>         {"NAND 64MiB 1,8V 8-bit",       0xA2, 0,  64, 0, LP_OPTIONS},
> --
> 1.7.10.4
>

Brian
Artem Bityutskiy March 5, 2013, 8:32 a.m. UTC | #2 
On Mon, 2013-03-04 at 10:36 -0800, Brian Norris wrote:
> > +        * These are the new chips with large page size, page size and
> > +        * eraseblock size is determined from the extended id bytes.
> 
> This is also incorrect grammar. It uses a comma to divide sentences
> and also uses "is". I would write something like this:
> 
> "These are the new chips with large page size. Their page size and
> eraseblock size are determined from the extended ID bytes."

Thanks Brian, will fix.
diff mbox

Patch

diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c
index e3aa274..b110742 100644
--- a/drivers/mtd/nand/nand_ids.c
+++ b/drivers/mtd/nand/nand_ids.c
@@ -10,17 +10,17 @@ 
  */
 #include <linux/module.h>
 #include <linux/mtd/nand.h>
+
+#define LP_OPTIONS NAND_SAMSUNG_LP_OPTIONS
+#define LP_OPTIONS16 (LP_OPTIONS | NAND_BUSWIDTH_16)
+
 /*
-*	Chip ID list
-*
-*	Name. ID code, pagesize, chipsize in MegaByte, eraseblock size,
-*	options
-*
-*	Pagesize; 0, 256, 512
-*	0	get this information from the extended chip ID
-+	256	256 Byte page size
-*	512	512 Byte page size
-*/
+ * The chip ID list:
+ *    name, device ID, page size, chip size in MiB, eraseblock size, options
+ *
+ * If page size and eraseblock size is 0, the sizes are taken from the extended
+ * chip ID.
+ */
 struct nand_flash_dev nand_flash_ids[] = {
 
 #ifdef CONFIG_MTD_NAND_MUSEUM_IDS
@@ -67,11 +67,9 @@  struct nand_flash_dev nand_flash_ids[] = {
 	{"NAND 256MiB 3,3V 8-bit",	0x71, 512, 256, 0x4000, 0},
 
 	/*
-	 * These are the new chips with large page size. The pagesize and the
-	 * erasesize is determined from the extended id bytes
+	 * These are the new chips with large page size, page size and
+	 * eraseblock size is determined from the extended id bytes.
 	 */
-#define LP_OPTIONS NAND_SAMSUNG_LP_OPTIONS
-#define LP_OPTIONS16 (LP_OPTIONS | NAND_BUSWIDTH_16)
 
 	/* 512 Megabit */
 	{"NAND 64MiB 1,8V 8-bit",	0xA2, 0,  64, 0, LP_OPTIONS},