Patchwork [U-Boot,8/9,v2] Exynos: clock: Correct pwm source clk selection

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Submitter Akshay Saraswat
Date Feb. 28, 2013, 10:59 a.m.
Message ID <1362049164-10297-9-git-send-email-akshay.s@samsung.com>
Download mbox | patch
Permalink /patch/223876/
State Changes Requested
Delegated to: Minkyu Kang
Headers show

Comments

Akshay Saraswat - Feb. 28, 2013, 10:59 a.m.
MPLL is selected as the source clk of pwm by default

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
---
Changes since v1:
        - Added "Acked-by: Simon Glass".

 board/samsung/smdk5250/setup.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Patch

diff --git a/board/samsung/smdk5250/setup.h b/board/samsung/smdk5250/setup.h
index a159601..34d8bc3 100644
--- a/board/samsung/smdk5250/setup.h
+++ b/board/samsung/smdk5250/setup.h
@@ -343,7 +343,7 @@ 
 #define TOP2_VAL		0x0110000
 
 /* CLK_SRC_PERIC0 */
-#define PWM_SEL		0
+#define PWM_SEL		6
 #define UART3_SEL	6
 #define UART2_SEL	6
 #define UART1_SEL	6