Patchwork [U-Boot] ARM: sam9x5: fix ethernet pins in MII mode

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Submitter Bo Shen
Date Feb. 28, 2013, 9:42 a.m.
Message ID <1362044569-22150-1-git-send-email-voice.shen@atmel.com>
Download mbox | patch
Permalink /patch/223858/
State Accepted
Delegated to: Andreas Bießmann
Headers show

Comments

Bo Shen - Feb. 28, 2013, 9:42 a.m.
From: Jesse Gilles <jgilles@multitech.com>

Fix pin setting in MII mode

Signed-off-by: Jesse Gilles <jgilles@multitech.com>
---
 arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c |   16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)
Andreas Bießmann - March 12, 2013, 12:04 p.m.
Dear Bo Shen,

Bo Shen <voice.shen@atmel.com> writes:
>From: Jesse Gilles <jgilles@multitech.com>
>
>Fix pin setting in MII mode
>
>Signed-off-by: Jesse Gilles <jgilles@multitech.com>
>
>---
>arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c |   16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bießmann

Patch

diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c
index d0d31da..3c58536 100644
--- a/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c
+++ b/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c
@@ -206,14 +206,14 @@  void at91_macb_hw_init(void)
 #ifndef CONFIG_RMII
 	/* Only emac0 support MII */
 	if (has_emac0()) {
-		at91_set_b_periph(AT91_PIO_PORTB, 16, 0);	/* ECRS */
-		at91_set_b_periph(AT91_PIO_PORTB, 17, 0);	/* ECOL */
-		at91_set_b_periph(AT91_PIO_PORTB, 13, 0);	/* ERX2 */
-		at91_set_b_periph(AT91_PIO_PORTB, 14, 0);	/* ERX3 */
-		at91_set_b_periph(AT91_PIO_PORTB, 15, 0);	/* ERXCK */
-		at91_set_b_periph(AT91_PIO_PORTB, 11, 0);	/* ETX2 */
-		at91_set_b_periph(AT91_PIO_PORTB, 12, 0);	/* ETX3 */
-		at91_set_b_periph(AT91_PIO_PORTB, 8, 0);	/* ETXER */
+		at91_set_a_periph(AT91_PIO_PORTB, 16, 0);	/* ECRS */
+		at91_set_a_periph(AT91_PIO_PORTB, 17, 0);	/* ECOL */
+		at91_set_a_periph(AT91_PIO_PORTB, 13, 0);	/* ERX2 */
+		at91_set_a_periph(AT91_PIO_PORTB, 14, 0);	/* ERX3 */
+		at91_set_a_periph(AT91_PIO_PORTB, 15, 0);	/* ERXCK */
+		at91_set_a_periph(AT91_PIO_PORTB, 11, 0);	/* ETX2 */
+		at91_set_a_periph(AT91_PIO_PORTB, 12, 0);	/* ETX3 */
+		at91_set_a_periph(AT91_PIO_PORTB, 8, 0);	/* ETXER */
 	}
 #endif
 }