Patchwork [3.5.y.z,extended,stable] Patch "ARM: i.MX25: clk: parent per5_clk to AHB clock" has been added to staging queue

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Submitter Luis Henriques
Date Feb. 26, 2013, 4:13 p.m.
Message ID <>
Download mbox | patch
Permalink /patch/223290/
State New
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Luis Henriques - Feb. 26, 2013, 4:13 p.m.
This is a note to let you know that I have just added a patch titled

    ARM: i.MX25: clk: parent per5_clk to AHB clock

to the linux-3.5.y-queue branch of the 3.5.y.z extended stable tree 
which can be found at:;a=shortlog;h=refs/heads/linux-3.5.y-queue

If you, or anyone else, feels it should not be added to this tree, please 
reply to this email.

For more information about the 3.5.y.z tree, see



From dadda9e763ad618e48e45086610ed2a5c8b36909 Mon Sep 17 00:00:00 2001
From: Steffen Trumtrar <>
Date: Wed, 30 Jan 2013 14:16:00 +0100
Subject: [PATCH] ARM: i.MX25: clk: parent per5_clk to AHB clock

commit 4b526ca5f627188425184a22ed46c91baa602d43 upstream.

The mxc-timer on the imx25 needs to be derived from the AHB clock.
If a bootloader reparents this clock to the ipg_clk_highfreq, which according
to the datasheet is a valid operation, the system can/will produce lockups/
freezes after some time [1].

This can be forced with code like
                syscall(SYS_clock_gettime, CLOCK_REALTIME, &tp);

This was already fixed with the commit
	"i.MX25 GPT clock fix: ensure correct the clock source" [2],
for 3.1-rc2, but was lost, when i.MX was converted to the common clock framework
("ARM i.MX25: implement clocks using common clock framework") [3]

[2]: 2012d9ca2a1381ae3e733330a7f0d1d2f1988bba
[3]: 6bbaec5676e4f475b0d78743cbd4c70a8804ce14

Signed-off-by: Steffen Trumtrar <>
Signed-off-by: Sascha Hauer <>
[ luis: adjust context ]
Signed-off-by: Luis Henriques <>
 arch/arm/mach-imx/clk-imx25.c | 3 +++
 1 file changed, 3 insertions(+)



diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index 4431a62..ec376d3 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -241,6 +241,9 @@  int __init mx25_clocks_init(void)
 	clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma");
 	clk_register_clkdev(clk[iim_ipg], "iim", NULL);

+	/* Clock source for gpt must be derived from AHB */
+	clk_set_parent(clk[per5_sel], clk[ahb]);
 	mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
 	return 0;