Patchwork Committed: Fix PR target/54640

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Submitter Joern Rennecke
Date Feb. 26, 2013, 3:29 p.m.
Message ID <20130226102918.9uzanx3qgocowogo-nzlynne@webmail.spamcop.net>
Download mbox | patch
Permalink /patch/223240/
State New
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Comments

Joern Rennecke - Feb. 26, 2013, 3:29 p.m.
Committed as obvious.
2013-02-26  Joern Rennecke  <joern.rennecke@embecosm.com>

        PR target/54640
        * config/arm/arm.c (const_ok_for_dimode_op): Make code consistent
        for HOST_WIDE_INT of 32 bit / same size as int.
        (arm_block_move_unaligned_straight): Likewise.
        (arm_adjust_block_mem): Likewise.
Richard Earnshaw - Feb. 26, 2013, 3:32 p.m.
On 26/02/13 15:29, Joern Rennecke wrote:
> Committed as obvious.
>
>
> pr54640-fix
>
>
> 2013-02-26  Joern Rennecke  <joern.rennecke@embecosm.com>
>
>          PR target/54640
>          * config/arm/arm.c (const_ok_for_dimode_op): Make code consistent
>          for HOST_WIDE_INT of 32 bit / same size as int.
>          (arm_block_move_unaligned_straight): Likewise.
>          (arm_adjust_block_mem): Likewise.
>
> Index: config/arm/arm.c
> ===================================================================
> --- config/arm/arm.c	(revision 196254)
> +++ config/arm/arm.c	(working copy)
> @@ -2607,7 +2607,7 @@ const_ok_for_op (HOST_WIDE_INT i, enum r
>   int
>   const_ok_for_dimode_op (HOST_WIDE_INT i, enum rtx_code code)
>   {
> -  HOST_WIDE_INT hi_val = (i >> 32) & 0xFFFFFFFF;
> +  HOST_WIDE_INT hi_val = (i >> 16 >> 16) & 0xFFFFFFFF;

I'm not convinced this is obvious.  It's certainly ugly.

I think the correct thing to do is to force all ARM targets to use a 
64-bit HOST_WIDE_INT.

R.
Joern Rennecke - Feb. 26, 2013, 3:58 p.m.
Quoting Richard Earnshaw <rearnsha@arm.com>:

> I'm not convinced this is obvious.  It's certainly ugly.

It's a common idiom.

> I think the correct thing to do is to force all ARM targets to use a
> 64-bit HOST_WIDE_INT.

Of course, if you want to set need_64bit_hwint=yes for arm in config.gcc,
and/or change the documentation that arm targets are not supported on
certain hosts, that changes things, so I have backed out my change and
leave you to do whatever you like with your port.

Patch

Index: config/arm/arm.c
===================================================================
--- config/arm/arm.c	(revision 196254)
+++ config/arm/arm.c	(working copy)
@@ -2607,7 +2607,7 @@  const_ok_for_op (HOST_WIDE_INT i, enum r
 int
 const_ok_for_dimode_op (HOST_WIDE_INT i, enum rtx_code code)
 {
-  HOST_WIDE_INT hi_val = (i >> 32) & 0xFFFFFFFF;
+  HOST_WIDE_INT hi_val = (i >> 16 >> 16) & 0xFFFFFFFF;
   HOST_WIDE_INT lo_val = i & 0xFFFFFFFF;
   rtx hi = GEN_INT (hi_val);
   rtx lo = GEN_INT (lo_val);
@@ -11347,10 +11347,10 @@  arm_block_move_unaligned_straight (rtx d
   /* Use hard registers if we have aligned source or destination so we can use
      load/store multiple with contiguous registers.  */
   if (dst_aligned || src_aligned)
-    for (i = 0; i < interleave_factor; i++)
+    for (i = 0; i < (HOST_WIDE_INT) interleave_factor; i++)
       regs[i] = gen_rtx_REG (SImode, i);
   else
-    for (i = 0; i < interleave_factor; i++)
+    for (i = 0; i < (HOST_WIDE_INT) interleave_factor; i++)
       regs[i] = gen_reg_rtx (SImode);
 
   dst = copy_addr_to_reg (XEXP (dstbase, 0));
@@ -11362,7 +11362,7 @@  arm_block_move_unaligned_straight (rtx d
      For copying the last bytes we want to subtract this offset again.  */
   src_autoinc = dst_autoinc = 0;
 
-  for (i = 0; i < interleave_factor; i++)
+  for (i = 0; i < (HOST_WIDE_INT) interleave_factor; i++)
     regnos[i] = i;
 
   /* Copy BLOCK_SIZE_BYTES chunks.  */
@@ -11378,7 +11378,7 @@  arm_block_move_unaligned_straight (rtx d
 	}
       else
 	{
-	  for (j = 0; j < interleave_factor; j++)
+	  for (j = 0; j < (HOST_WIDE_INT) interleave_factor; j++)
 	    {
 	      addr = plus_constant (Pmode, src, (srcoffset + j * UNITS_PER_WORD
 						 - src_autoinc));
@@ -11398,7 +11398,7 @@  arm_block_move_unaligned_straight (rtx d
 	}
       else
 	{
-	  for (j = 0; j < interleave_factor; j++)
+	  for (j = 0; j < (HOST_WIDE_INT) interleave_factor; j++)
 	    {
 	      addr = plus_constant (Pmode, dst, (dstoffset + j * UNITS_PER_WORD
 						 - dst_autoinc));
@@ -11417,7 +11417,7 @@  arm_block_move_unaligned_straight (rtx d
   
   words = remaining / UNITS_PER_WORD;
 
-  gcc_assert (words < interleave_factor);
+  gcc_assert (words < (HOST_WIDE_INT) interleave_factor);
   
   if (src_aligned && words > 1)
     {
@@ -11555,7 +11555,8 @@  arm_adjust_block_mem (rtx mem, HOST_WIDE
   /* Although the new mem does not refer to a known location,
      it does keep up to LENGTH bytes of alignment.  */
   *loop_mem = change_address (mem, BLKmode, *loop_reg);
-  set_mem_align (*loop_mem, MIN (MEM_ALIGN (mem), length * BITS_PER_UNIT));
+  set_mem_align (*loop_mem,
+		 MIN ((HOST_WIDE_INT) MEM_ALIGN (mem), length * BITS_PER_UNIT));
 }
 
 /* From mips_block_move_loop: