[U-Boot] powerpc/b4: Fix the wrong register offset of B4 PCIE module

Message ID 1361787257-24197-1-git-send-email-Gang.Liu@freescale.com
State Accepted, archived
Delegated to: Andy Fleming
Headers show

Commit Message

Liu Gang Feb. 25, 2013, 10:14 a.m.
B4420/B4860 PCIE can not work because of the wrong definition of
the PCIE register offset in the file:

Add the judgement of B4420/B4860 to make the register offset to:
	#define CONFIG_SYS_MPC85xx_PCIE1_OFFSET         0x200000

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
 arch/powerpc/include/asm/immap_85xx.h |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)


diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 4eb3f79..1c8d1ac 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2914,7 +2914,8 @@  struct ccsr_pman {
 #define CONFIG_SYS_MPC85xx_IFC_OFFSET		0x124000
 #define CONFIG_SYS_MPC85xx_GPIO_OFFSET		0x130000
+#if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && !defined(CONFIG_PPC_B4860)\
+	&& !defined(CONFIG_PPC_B4420)
 #define CONFIG_SYS_MPC85xx_PCIE1_OFFSET		0x240000
 #define CONFIG_SYS_MPC85xx_PCIE2_OFFSET		0x250000
 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET		0x260000