| Submitter | Peter Crosthwaite |
|---|---|
| Date | Feb. 25, 2013, 8:09 a.m. |
| Message ID | <1361779789-9393-1-git-send-email-peter.crosthwaite@xilinx.com> |
| Download | mbox | patch |
| Permalink | /patch/222859/ |
| State | New |
| Headers | show |
Comments
Patch
diff --git a/hw/xilinx_axienet.c b/hw/xilinx_axienet.c index e5d9251..9a82b1b 100644 --- a/hw/xilinx_axienet.c +++ b/hw/xilinx_axienet.c @@ -515,6 +515,8 @@ static void enet_write(void *opaque, hwaddr addr, s->rcw[addr & 1] = value; if ((addr & 1) && value & RCW1_RST) { axienet_rx_reset(s); + } else { + qemu_flush_queued_packets(qemu_get_queue(s->nic)); } break;
When the conditions blocking receiving are cleared, check for buffered rx packets. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> --- hw/xilinx_axienet.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-)