[v2,2/3] powerpc/fsl_lbc: Disable UPM interrupt

Submitted by Aaron Sierra on Feb. 21, 2013, 9:37 p.m.

Details

Message ID 8c255900-acee-4676-a86e-cb66aa5c777c@zimbra
State New, archived
Headers show

Commit Message

Aaron Sierra Feb. 21, 2013, 9:37 p.m.
From: Nate Case <ncase@xes-inc.com>

We aren't doing anything with the UPM event in the localbus interrupt
handler, so there is no point in enabling it.  This interrupt was
being triggered constantly during UPM NAND flash activity.

Signed-off-by: Nate Case <ncase@xes-inc.com>
---
 arch/powerpc/include/asm/fsl_lbc.h |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

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diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h
index 19e0cd2..8971a9f 100644
--- a/arch/powerpc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -137,7 +137,7 @@  struct fsl_lbc_regs {
 #define LTESR_CLEAR	0xFFFFFFFF
 #define LTECCR_CLEAR	0xFFFFFFFF
 #define LTESR_STATUS	LTESR_MASK
-#define LTEIR_ENABLE	LTESR_MASK
+#define LTEIR_ENABLE	(LTESR_MASK & ~LTESR_UPM)
 #define LTEDR_ENABLE	0x00000000
 	__be32 ltedr;           /**< Transfer Error Disable Register */
 	__be32 lteir;           /**< Transfer Error Interrupt Register */