diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h
index 420b453..19e0cd2 100644
--- a/arch/powerpc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -263,6 +263,7 @@ extern int fsl_upm_find(phys_addr_t addr_base, struct fsl_upm *upm);
 static inline void fsl_upm_start_pattern(struct fsl_upm *upm, u8 pat_offset)
 {
 	clrsetbits_be32(upm->mxmr, MxMR_MAD, MxMR_OP_RP | pat_offset);
+	(void) in_be32(upm->mxmr);
 }
 
 /**
diff --git a/arch/powerpc/sysdev/fsl_lbc.c b/arch/powerpc/sysdev/fsl_lbc.c
index 6bc5a54..9b4f0cf 100644
--- a/arch/powerpc/sysdev/fsl_lbc.c
+++ b/arch/powerpc/sysdev/fsl_lbc.c
@@ -163,6 +163,11 @@ int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base, u32 mar)
 	spin_lock_irqsave(&fsl_lbc_lock, flags);
 
 	out_be32(&fsl_lbc_ctrl_dev->regs->mar, mar);
+	/*
+	 * Dummy read required to ensure that the MAR write takes effect
+	 * before running the pattern
+	 */
+	(void) in_be32(&fsl_lbc_ctrl_dev->regs->mar);
 
 	switch (upm->width) {
 	case 8: