Patchwork [U-Boot] Initialise correct GPMC WAITx irq for AM33xx

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Submitter Mark Jackson
Date Feb. 21, 2013, 12:49 p.m.
Message ID <512617E2.9020404@mimc.co.uk>
Download mbox | patch
Permalink /patch/222275/
State Accepted
Delegated to: Tom Rini
Headers show

Comments

Mark Jackson - Feb. 21, 2013, 12:49 p.m.
Currently WAIT0 irq is reset and then WAIT1 irq is enabled.
Fix it such that WAIT0 irq is enabled instead.

Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
---
 arch/arm/cpu/armv7/am33xx/mem.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
Peter Korsgaard - Feb. 21, 2013, 1:04 p.m.
>>>>> "Mark" == Mark Jackson <mpfj-list@mimc.co.uk> writes:

 Mark> Currently WAIT0 irq is reset and then WAIT1 irq is enabled.
 Mark> Fix it such that WAIT0 irq is enabled instead.

 Mark> Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
 Mark> ---
 Mark>  arch/arm/cpu/armv7/am33xx/mem.c |    2 +-
 Mark>  1 file changed, 1 insertion(+), 1 deletion(-)

 Mark> diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/am33xx/mem.c
 Mark> index b8f54ab..b86b0de 100644
 Mark> --- a/arch/arm/cpu/armv7/am33xx/mem.c
 Mark> +++ b/arch/arm/cpu/armv7/am33xx/mem.c
 Mark> @@ -83,7 +83,7 @@ void gpmc_init(void)
 Mark>  	/* global settings */
 Mark>  	writel(0x00000008, &gpmc_cfg->sysconfig);
 Mark>  	writel(0x00000100, &gpmc_cfg->irqstatus);
 Mark> -	writel(0x00000200, &gpmc_cfg->irqenable);
 Mark> +	writel(0x00000100, &gpmc_cfg->irqenable);

Acked-by: Peter Korsgaard <jacmet@sunsite.dk>

Why do we even enable the irq in the first place? The gpmc driver just
polls irqstatus anyway.
Tom Rini - March 26, 2013, 2:51 p.m.
On Thu, Feb 21, 2013 at 02:49:38AM -0000, Mark Jackson wrote:

> Currently WAIT0 irq is reset and then WAIT1 irq is enabled.
> Fix it such that WAIT0 irq is enabled instead.
> 
> Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
> Acked-by: Peter Korsgaard <jacmet@sunsite.dk>

Applied to u-boot-ti/master (and already pulled into u-boot-arm),
thanks!

Patch

diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/am33xx/mem.c
index b8f54ab..b86b0de 100644
--- a/arch/arm/cpu/armv7/am33xx/mem.c
+++ b/arch/arm/cpu/armv7/am33xx/mem.c
@@ -83,7 +83,7 @@  void gpmc_init(void)
 	/* global settings */
 	writel(0x00000008, &gpmc_cfg->sysconfig);
 	writel(0x00000100, &gpmc_cfg->irqstatus);
-	writel(0x00000200, &gpmc_cfg->irqenable);
+	writel(0x00000100, &gpmc_cfg->irqenable);
 	writel(0x00000012, &gpmc_cfg->config);
 	/*
 	 * Disable the GPMC0 config set by ROM code