From patchwork Wed Feb 20 18:35:17 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rhyland Klein X-Patchwork-Id: 222138 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id CF4EF2C007B for ; Thu, 21 Feb 2013 05:34:55 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758457Ab3BTSey (ORCPT ); Wed, 20 Feb 2013 13:34:54 -0500 Received: from hqemgate03.nvidia.com ([216.228.121.140]:6816 "EHLO hqemgate03.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753818Ab3BTSew (ORCPT ); Wed, 20 Feb 2013 13:34:52 -0500 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate03.nvidia.com id ; Wed, 20 Feb 2013 10:39:40 -0800 Received: from hqemhub01.nvidia.com ([172.17.108.22]) by hqnvupgp08.nvidia.com (PGP Universal service); Wed, 20 Feb 2013 10:30:12 -0800 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Wed, 20 Feb 2013 10:30:12 -0800 Received: from rklein-linux.nvidia.com (172.20.144.16) by hqemhub01.nvidia.com (172.20.150.30) with Microsoft SMTP Server (TLS) id 8.3.297.1; Wed, 20 Feb 2013 10:34:50 -0800 From: Rhyland Klein To: Stephen Warren , Chris Ball , , CC: Pritesh Raithatha , Rhyland Klein Subject: [PATCH 4/4] mmc: host: sdhci-tegra: add basic support for Tegra114 Date: Wed, 20 Feb 2013 13:35:17 -0500 Message-ID: <1361385317-6020-5-git-send-email-rklein@nvidia.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1361385317-6020-1-git-send-email-rklein@nvidia.com> References: <1361385317-6020-1-git-send-email-rklein@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The mmc controller on Tegra114 platforms is basically compatible with the settings used for Tegra30. However there is a difference where we don't need the extra ENABLE_SDHCI_SPEC_300 quirk as Tegra114 hardware advertises v3.0 support already. Signed-off-by: Rhyland Klein --- drivers/mmc/host/sdhci-tegra.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 5e126bf..931d9d7 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -201,7 +201,21 @@ static struct sdhci_tegra_soc_data soc_data_tegra30 = { .nvquirks = NVQUIRK_ENABLE_SDHCI_SPEC_300, }; +static struct sdhci_pltfm_data sdhci_tegra114_pdata = { + .quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | + SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | + SDHCI_QUIRK_SINGLE_POWER_WRITE | + SDHCI_QUIRK_NO_HISPD_BIT | + SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC, + .ops = &tegra_sdhci_ops, +}; + +static struct sdhci_tegra_soc_data soc_data_tegra114 = { + .pdata = &sdhci_tegra114_pdata, +}; + static const struct of_device_id sdhci_tegra_dt_match[] = { + { .compatible = "nvidia,tegra114-sdhci", .data = &soc_data_tegra114 }, { .compatible = "nvidia,tegra30-sdhci", .data = &soc_data_tegra30 }, { .compatible = "nvidia,tegra20-sdhci", .data = &soc_data_tegra20 }, {}