From patchwork Wed Feb 20 07:51:51 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 222082 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 2DEB02C007C for ; Thu, 21 Feb 2013 00:25:42 +1100 (EST) Received: from localhost ([::1]:48254 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U84UZ-0001md-LA for incoming@patchwork.ozlabs.org; Wed, 20 Feb 2013 02:53:27 -0500 Received: from eggs.gnu.org ([208.118.235.92]:43638) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U84Ts-0008WV-5Y for qemu-devel@nongnu.org; Wed, 20 Feb 2013 02:52:51 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1U84Tm-00026f-1X for qemu-devel@nongnu.org; Wed, 20 Feb 2013 02:52:44 -0500 Received: from mail-pb0-f47.google.com ([209.85.160.47]:61484) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U84Tl-00026S-S7 for qemu-devel@nongnu.org; Wed, 20 Feb 2013 02:52:37 -0500 Received: by mail-pb0-f47.google.com with SMTP id rp2so2719099pbb.6 for ; Tue, 19 Feb 2013 23:52:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=/jLOn02ga/ov9ZUiwRwkiKPYMNVgZcEn0sMHxZhWAvI=; b=ZyI21J+TFoQgX3/oAYL4R32NmbQnCNE5WeFXyusOZHzWI6MwGs+K61qnf7Wv/IewyN iveyjEEQVhhn9TzRt3w/UcGsDLWhs6TDKAOkBt5zkXUe5oNskD/fcIpTtdejvmt2mVaM ZW0zPwDaE6S9ubnJkBxdCmO3KGeq77UPjFO3ieuh/wmvfvHWUibgPbJKK2sJkTmXE7T2 jKO6e/0Pbrn1FOWGntIC7ia3Do+m5y6Q0LPjpK8HdVAr8IPplBQ7BNKGie/fD9B99G5b bj66rp/JTPkwtnvo+sar02ScDilRvcmARtdfgsOx0Ws+j2lYGxOIAWy6nuiYmHZXV8IN LXrA== X-Received: by 10.66.175.143 with SMTP id ca15mr1049669pac.155.1361346756967; Tue, 19 Feb 2013 23:52:36 -0800 (PST) Received: from anchor.twiddle.net (50-194-63-110-static.hfc.comcastbusiness.net. [50.194.63.110]) by mx.google.com with ESMTPS id c8sm20826347pbq.10.2013.02.19.23.52.35 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 19 Feb 2013 23:52:35 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 19 Feb 2013 23:51:51 -0800 Message-Id: <1361346746-8511-4-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1361346746-8511-1-git-send-email-rth@twiddle.net> References: <1361346746-8511-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 209.85.160.47 Cc: blauwirbel@gmail.com, aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 03/38] tcg-sparc: Always implement 32-bit multiword ops X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Cc: Blue Swirl Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.c | 6 ++++-- tcg/sparc/tcg-target.h | 7 +++---- 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index 03db514..6d489fc 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -1327,6 +1327,8 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, args[3], const_args[3], args[4], const_args[4]); break; +#endif + case INDEX_op_add2_i32: tcg_out_addsub2(s, args[0], args[1], args[2], args[3], args[4], const_args[4], args[5], const_args[5], @@ -1342,7 +1344,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, ARITH_UMUL); tcg_out_rdy(s, args[1]); break; -#endif case INDEX_op_qemu_ld8u: tcg_out_qemu_ld(s, args, 0); @@ -1511,10 +1512,11 @@ static const TCGTargetOpDef sparc_op_defs[] = { #if TCG_TARGET_REG_BITS == 32 { INDEX_op_brcond2_i32, { "rZ", "rZ", "rJ", "rJ" } }, { INDEX_op_setcond2_i32, { "r", "rZ", "rZ", "rJ", "rJ" } }, +#endif + { INDEX_op_add2_i32, { "r", "r", "rZ", "rZ", "rJ", "rJ" } }, { INDEX_op_sub2_i32, { "r", "r", "rZ", "rZ", "rJ", "rJ" } }, { INDEX_op_mulu2_i32, { "r", "r", "rZ", "rJ" } }, -#endif #if TCG_TARGET_REG_BITS == 64 { INDEX_op_mov_i64, { "r", "r" } }, diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index 6c62e45..8446721 100644 --- a/tcg/sparc/tcg-target.h +++ b/tcg/sparc/tcg-target.h @@ -102,6 +102,9 @@ typedef enum { #define TCG_TARGET_HAS_nor_i32 0 #define TCG_TARGET_HAS_deposit_i32 0 #define TCG_TARGET_HAS_movcond_i32 1 +#define TCG_TARGET_HAS_add2_i32 1 +#define TCG_TARGET_HAS_sub2_i32 1 +#define TCG_TARGET_HAS_mulu2_i32 1 #if TCG_TARGET_REG_BITS == 64 #define TCG_TARGET_HAS_div_i64 1 @@ -124,10 +127,6 @@ typedef enum { #define TCG_TARGET_HAS_nor_i64 0 #define TCG_TARGET_HAS_deposit_i64 0 #define TCG_TARGET_HAS_movcond_i64 1 - -#define TCG_TARGET_HAS_add2_i32 0 -#define TCG_TARGET_HAS_sub2_i32 0 -#define TCG_TARGET_HAS_mulu2_i32 0 #endif #define TCG_AREG0 TCG_REG_I0