| Submitter | Anton Vorontsov |
|---|---|
| Date | Feb. 5, 2009, 8:10 p.m. |
| Message ID | <20090205201040.GB3425@oksana.dev.rtsoft.ru> |
| Download | mbox | patch |
| Permalink | /patch/22203/ |
| State | Accepted |
| Commit | e85477f516c2de7ed515fcf94ceab5282eba7fa4 |
| Delegated to: | Kumar Gala |
| Headers | show |
Comments
On Feb 5, 2009, at 2:10 PM, Anton Vorontsov wrote: > TSEC0 is connected to Vitesse 7385 5-port switch. The switch > isn't connected to any mdio bus, the link to the switch is fixed > to Full-duplex 1000 Mb/s (no pause). > > This patch fixes following failure during bootup: > > mdio@24520:01 not found > eth0: Could not attach to PHY > IP-Config: Failed to open eth0 > > Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> > --- > arch/powerpc/boot/dts/mpc8313erdb.dts | 9 ++------- > arch/powerpc/configs/83xx/mpc8313_rdb_defconfig | 2 +- > 2 files changed, 3 insertions(+), 8 deletions(-) applied to merge - k
On Fri, Feb 6, 2009 at 4:10 AM, Anton Vorontsov <avorontsov@ru.mvista.com> wrote: > TSEC0 is connected to Vitesse 7385 5-port switch. The switch > isn't connected to any mdio bus, the link to the switch is fixed > to Full-duplex 1000 Mb/s (no pause). It's a complex case for RDB boards. The revision A and revision B boards DO always connect TSEC0 to Vitesse switch. While the latest revision C board has one setting to connect TSEC0 to a Marvell PHY and MDIO bus. In BSP we have several DTS's for each setting of the board, shouldn't we do the same for upstream? - Leo
On Feb 9, 2009, at 1:47 AM, Li Yang wrote: > > It's a complex case for RDB boards. The revision A and revision B > boards DO always connect TSEC0 to Vitesse switch. While the latest > revision C board has one setting to connect TSEC0 to a Marvell PHY and > MDIO bus. In BSP we have several DTS's for each setting of the board, > shouldn't we do the same for upstream? Is this something we can detect and deal with in u-boot? If not than having multiple .dts for the revisions seems like the only solution. - k
Patch
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts index 3f84cd0..3ebf7ec 100644 --- a/arch/powerpc/boot/dts/mpc8313erdb.dts +++ b/arch/powerpc/boot/dts/mpc8313erdb.dts @@ -191,7 +191,8 @@ interrupts = <37 0x8 36 0x8 35 0x8>; interrupt-parent = <&ipic>; tbi-handle = < &tbi0 >; - phy-handle = < &phy1 >; + /* Vitesse 7385 isn't on the MDIO bus */ + fixed-link = <1 1 1000 0 0>; fsl,magic-packet; mdio@24520 { @@ -199,12 +200,6 @@ #size-cells = <0>; compatible = "fsl,gianfar-mdio"; reg = <0x24520 0x20>; - phy1: ethernet-phy@1 { - interrupt-parent = <&ipic>; - interrupts = <19 0x8>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; phy4: ethernet-phy@4 { interrupt-parent = <&ipic>; interrupts = <20 0x8>; diff --git a/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig b/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig index 9e47ae9..409d017 100644 --- a/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig +++ b/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig @@ -651,7 +651,7 @@ CONFIG_CICADA_PHY=y # CONFIG_NATIONAL_PHY is not set # CONFIG_STE10XP is not set # CONFIG_LSI_ET1011C_PHY is not set -# CONFIG_FIXED_PHY is not set +CONFIG_FIXED_PHY=y # CONFIG_MDIO_BITBANG is not set CONFIG_NET_ETHERNET=y CONFIG_MII=y
TSEC0 is connected to Vitesse 7385 5-port switch. The switch isn't connected to any mdio bus, the link to the switch is fixed to Full-duplex 1000 Mb/s (no pause). This patch fixes following failure during bootup: mdio@24520:01 not found eth0: Could not attach to PHY IP-Config: Failed to open eth0 Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> --- arch/powerpc/boot/dts/mpc8313erdb.dts | 9 ++------- arch/powerpc/configs/83xx/mpc8313_rdb_defconfig | 2 +- 2 files changed, 3 insertions(+), 8 deletions(-)