From patchwork Wed Feb 20 04:57:35 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leon Yu X-Patchwork-Id: 221972 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 4A6242C007A for ; Wed, 20 Feb 2013 18:18:13 +1100 (EST) Received: from localhost ([::1]:54055 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U83wP-0004Zy-CS for incoming@patchwork.ozlabs.org; Wed, 20 Feb 2013 02:18:09 -0500 Received: from eggs.gnu.org ([208.118.235.92]:57507) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U81kg-0000dE-7U for qemu-devel@nongnu.org; Tue, 19 Feb 2013 23:58:00 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1U81kb-0004Mx-Mq for qemu-devel@nongnu.org; Tue, 19 Feb 2013 23:57:54 -0500 Received: from mail-pb0-f42.google.com ([209.85.160.42]:47262) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U81kb-0004Ml-Gs for qemu-devel@nongnu.org; Tue, 19 Feb 2013 23:57:49 -0500 Received: by mail-pb0-f42.google.com with SMTP id xb4so2654253pbc.1 for ; Tue, 19 Feb 2013 20:57:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer; bh=0hXSwd/ipy7q57bKtiNn6A7tJMiqRfZI7AuhMi2v9dw=; b=x0aTiKOZDEMfVwiqmHy/G/qWdwkPZw8BYdy6MiSEZIlRl3fjdXR1iz3FKQzGtrft5V JFAySR76AJIpcLPr1/Djepk/03Z8tWYNuzyFRZuTX+V995Sc0TI1MPZodnW9oHA15UuU RbkaJ1PlTYA7H1yyhJzQhxSZ7rEkoO730suBF+Q/IJFsRYWg07RCP4DfDy0onDePWT2N w8iVgu1hjEPRqV+F75Al5eWHsHHSvPMWbd2oNx0W671ZL12OkamDVa9w4G7M3pxZM6jr /oivaPC3XvbdxXefq3avb6avUsbLMh68TPcldOWaYEo9uS46b+3jqlrDg0Ykf0xJLJaP NrsQ== X-Received: by 10.66.162.133 with SMTP id ya5mr435323pab.104.1361336268479; Tue, 19 Feb 2013 20:57:48 -0800 (PST) Received: from localhost.localdomain (114-32-219-228.HINET-IP.hinet.net. [114.32.219.228]) by mx.google.com with ESMTPS id pg6sm20310548pbb.0.2013.02.19.20.57.46 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 19 Feb 2013 20:57:47 -0800 (PST) From: Leon Yu To: qemu-devel@nongnu.org Date: Wed, 20 Feb 2013 12:57:35 +0800 Message-Id: <1361336255-7464-1-git-send-email-chianglungyu@gmail.com> X-Mailer: git-send-email 1.7.9.5 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 209.85.160.42 X-Mailman-Approved-At: Wed, 20 Feb 2013 02:18:00 -0500 Cc: Leon Yu , aurelien@aurel32.net Subject: [Qemu-devel] [PATCH] target-mips: fix mips16 MULT/DIV (broken by ASE_DSP) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org using bit[11-12] of opcode as acc is not correct for ASE_MIPS16 instructions. doing so generates RI/DSPDIS exception when decoding MIPS16 MULT/DIV. Signed-off-by: Leon Yu --- target-mips/translate.c | 14 +++++++------- 1 files changed, 7 insertions(+), 7 deletions(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index 4ee9615..c5834cd 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -2594,7 +2594,7 @@ static void gen_HILO (DisasContext *ctx, uint32_t opc, int reg) } if (opc == OPC_MFHI || opc == OPC_MFLO) { - acc = ((ctx->opcode) >> 21) & 0x03; + acc = (ctx->hflags & MIPS_HFLAG_M16) ? 0 : ((ctx->opcode) >> 21) & 0x03; } else { acc = ((ctx->opcode) >> 11) & 0x03; } @@ -2717,7 +2717,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc, { TCGv_i64 t2 = tcg_temp_new_i64(); TCGv_i64 t3 = tcg_temp_new_i64(); - acc = ((ctx->opcode) >> 11) & 0x03; + acc = (ctx->hflags & MIPS_HFLAG_M16) ? 0 : ((ctx->opcode) >> 11) & 0x03; if (acc != 0) { check_dsp(ctx); } @@ -2739,7 +2739,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc, { TCGv_i64 t2 = tcg_temp_new_i64(); TCGv_i64 t3 = tcg_temp_new_i64(); - acc = ((ctx->opcode) >> 11) & 0x03; + acc = (ctx->hflags & MIPS_HFLAG_M16) ? 0 : ((ctx->opcode) >> 11) & 0x03; if (acc != 0) { check_dsp(ctx); } @@ -2803,7 +2803,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc, { TCGv_i64 t2 = tcg_temp_new_i64(); TCGv_i64 t3 = tcg_temp_new_i64(); - acc = ((ctx->opcode) >> 11) & 0x03; + acc = (ctx->hflags & MIPS_HFLAG_M16) ? 0 : ((ctx->opcode) >> 11) & 0x03; if (acc != 0) { check_dsp(ctx); } @@ -2827,7 +2827,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc, { TCGv_i64 t2 = tcg_temp_new_i64(); TCGv_i64 t3 = tcg_temp_new_i64(); - acc = ((ctx->opcode) >> 11) & 0x03; + acc = (ctx->hflags & MIPS_HFLAG_M16) ? 0 : ((ctx->opcode) >> 11) & 0x03; if (acc != 0) { check_dsp(ctx); } @@ -2853,7 +2853,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc, { TCGv_i64 t2 = tcg_temp_new_i64(); TCGv_i64 t3 = tcg_temp_new_i64(); - acc = ((ctx->opcode) >> 11) & 0x03; + acc = (ctx->hflags & MIPS_HFLAG_M16) ? 0 : ((ctx->opcode) >> 11) & 0x03; if (acc != 0) { check_dsp(ctx); } @@ -2877,7 +2877,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc, { TCGv_i64 t2 = tcg_temp_new_i64(); TCGv_i64 t3 = tcg_temp_new_i64(); - acc = ((ctx->opcode) >> 11) & 0x03; + acc = (ctx->hflags & MIPS_HFLAG_M16) ? 0 : ((ctx->opcode) >> 11) & 0x03; if (acc != 0) { check_dsp(ctx); }