From patchwork Tue Feb 19 16:22:11 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabien Chouteau X-Patchwork-Id: 221734 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8A5622C0091 for ; Wed, 20 Feb 2013 04:02:54 +1100 (EST) Received: from localhost ([::1]:44217 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U7pyL-0008BG-Hf for incoming@patchwork.ozlabs.org; Tue, 19 Feb 2013 11:23:13 -0500 Received: from eggs.gnu.org ([208.118.235.92]:42587) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U7pxe-0006Of-Rf for qemu-devel@nongnu.org; Tue, 19 Feb 2013 11:22:37 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1U7pxT-0005bo-SY for qemu-devel@nongnu.org; Tue, 19 Feb 2013 11:22:30 -0500 Received: from mel.act-europe.fr ([194.98.77.210]:50642) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U7pxT-0005bB-Hg for qemu-devel@nongnu.org; Tue, 19 Feb 2013 11:22:19 -0500 Received: from localhost (localhost [127.0.0.1]) by filtered-smtp.eu.adacore.com (Postfix) with ESMTP id B29F7290051; Tue, 19 Feb 2013 17:22:18 +0100 (CET) X-Virus-Scanned: amavisd-new at eu.adacore.com Received: from mel.act-europe.fr ([127.0.0.1]) by localhost (smtp.eu.adacore.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id brnIYE2ZEtro; Tue, 19 Feb 2013 17:22:18 +0100 (CET) Received: from PomPomGalli.act-europe.fr (pompomgalli.act-europe.fr [10.10.1.88]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mel.act-europe.fr (Postfix) with ESMTP id 9042D29004F; Tue, 19 Feb 2013 17:22:18 +0100 (CET) From: Fabien Chouteau To: qemu-devel@nongnu.org Date: Tue, 19 Feb 2013 17:22:11 +0100 Message-Id: <1361290933-4748-3-git-send-email-chouteau@adacore.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1361290933-4748-1-git-send-email-chouteau@adacore.com> References: <1361290933-4748-1-git-send-email-chouteau@adacore.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x X-Received-From: 194.98.77.210 Cc: ronald.hecht@gmx.de, blauwirbel@gmail.com, Fabien Chouteau Subject: [Qemu-devel] [PATCH V2 2/4] grlib-apbuart: Add support of various flags X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Ronald Hecht - enable/disable Rx and Tx - Rx and Tx interrupt - Tx FIFO empty and Tx SHIFT empty Signed-off-by: Fabien Chouteau --- hw/grlib_apbuart.c | 36 +++++++++++++++++++++++++++++------- 1 file changed, 29 insertions(+), 7 deletions(-) diff --git a/hw/grlib_apbuart.c b/hw/grlib_apbuart.c index 3a61788..ba1685a 100644 --- a/hw/grlib_apbuart.c +++ b/hw/grlib_apbuart.c @@ -75,7 +75,6 @@ typedef struct UART { CharDriverState *chr; /* registers */ - uint32_t receive; uint32_t status; uint32_t control; @@ -136,12 +135,14 @@ static void grlib_apbuart_receive(void *opaque, const uint8_t *buf, int size) { UART *uart = opaque; - uart_add_to_fifo(uart, buf, size); + if (uart->control & UART_RECEIVE_ENABLE) { + uart_add_to_fifo(uart, buf, size); - uart->status |= UART_DATA_READY; + uart->status |= UART_DATA_READY; - if (uart->control & UART_RECEIVE_INTERRUPT) { - qemu_irq_pulse(uart->irq); + if (uart->control & UART_RECEIVE_INTERRUPT) { + qemu_irq_pulse(uart->irq); + } } } @@ -193,8 +194,15 @@ static void grlib_apbuart_write(void *opaque, hwaddr addr, switch (addr) { case DATA_OFFSET: case DATA_OFFSET + 3: /* When only one byte write */ - c = value & 0xFF; - qemu_chr_fe_write(uart->chr, &c, 1); + /* Transmit when character device available and transmitter enabled */ + if ((uart->chr) && (uart->control & UART_TRANSMIT_ENABLE)) { + c = value & 0xFF; + qemu_chr_fe_write(uart->chr, &c, 1); + /* Generate interrupt */ + if (uart->control & UART_TRANSMIT_INTERRUPT) { + qemu_irq_pulse(uart->irq); + } + } return; case STATUS_OFFSET: @@ -242,6 +250,19 @@ static int grlib_apbuart_init(SysBusDevice *dev) return 0; } +static void grlib_apbuart_reset(DeviceState *d) +{ + UART *uart = container_of(d, UART, busdev.qdev); + + /* Transmitter FIFO and shift registers are always empty in QEMU */ + uart->status = UART_TRANSMIT_FIFO_EMPTY | UART_TRANSMIT_SHIFT_EMPTY; + /* Everything is off */ + uart->control = 0; + /* Flush receive FIFO */ + uart->len = 0; + uart->current = 0; +} + static Property grlib_apbuart_properties[] = { DEFINE_PROP_CHR("chrdev", UART, chr), DEFINE_PROP_END_OF_LIST(), @@ -253,6 +274,7 @@ static void grlib_apbuart_class_init(ObjectClass *klass, void *data) SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); k->init = grlib_apbuart_init; + dc->reset = grlib_apbuart_reset; dc->props = grlib_apbuart_properties; }