From patchwork Mon Feb 18 20:21:04 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 221532 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 04DB52C0082 for ; Tue, 19 Feb 2013 09:30:02 +1100 (EST) Received: from localhost ([::1]:34283 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U7XEd-0006jz-CO for incoming@patchwork.ozlabs.org; Mon, 18 Feb 2013 15:22:47 -0500 Received: from eggs.gnu.org ([208.118.235.92]:38022) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U7XDf-0005DJ-T1 for qemu-devel@nongnu.org; Mon, 18 Feb 2013 15:21:52 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1U7XDb-00026k-KQ for qemu-devel@nongnu.org; Mon, 18 Feb 2013 15:21:47 -0500 Received: from mail-pb0-f54.google.com ([209.85.160.54]:46462) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U7XDb-00026e-Ap for qemu-devel@nongnu.org; Mon, 18 Feb 2013 15:21:43 -0500 Received: by mail-pb0-f54.google.com with SMTP id rr4so1833294pbb.27 for ; Mon, 18 Feb 2013 12:21:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=RAk3Frp+CpBsfJ3E1VN+6WxsIkxz7XCFhWcmTQ+pjE4=; b=gIZQ/MRXMA1W5/h31JjZrZqWZ6nrgUHxqP6bDUxOkkz3mHfozDjEEE7G6fyz255MkV j0ZIGQisLTvUKWnZBMhwLbP35r/oHBfP1gqKQjPsF2Uuf0QuyuuUB3/P70b9zxKvGFkW 75n02kK+E58H27rc1rQ05xzTqjYutG0TolcMcr/iDdzzoUnh8/qsLzl/V5zkBmqZZZUH rZVjY4gyoADwsxFvGXiYNur1ib+sntENotYL4NRfj8Ig/e3x2pn1oWOJXvsjS0J1v7Ec QAjAP8JEMwSrMP4Fw9JFUrTDmX348MaUXBTFI2Biwy508zdJ8YWI7a9QdO0KRCNzcEUr +KMQ== X-Received: by 10.68.204.234 with SMTP id lb10mr33214279pbc.64.1361218902702; Mon, 18 Feb 2013 12:21:42 -0800 (PST) Received: from pebble.twiddle.net (50-194-63-110-static.hfc.comcastbusiness.net. [50.194.63.110]) by mx.google.com with ESMTPS id z6sm78739077pav.3.2013.02.18.12.21.41 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 18 Feb 2013 12:21:41 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 18 Feb 2013 12:21:04 -0800 Message-Id: <1361218873-1754-16-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1361218873-1754-1-git-send-email-rth@twiddle.net> References: <1361218873-1754-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 209.85.160.54 Cc: av1474@comtv.ru Subject: [Qemu-devel] [PATCH 15/24] tcg-ppc64: Implement rotates X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- tcg/ppc64/tcg-target.c | 39 +++++++++++++++++++++++++++++++++++++++ tcg/ppc64/tcg-target.h | 4 ++-- 2 files changed, 41 insertions(+), 2 deletions(-) diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c index 4a55ae7..a08ad90 100644 --- a/tcg/ppc64/tcg-target.c +++ b/tcg/ppc64/tcg-target.c @@ -336,11 +336,14 @@ static int tcg_target_const_match (tcg_target_long val, #define LWZU OPCD( 33) #define STWU OPCD( 37) +#define RLWIMI OPCD( 20) #define RLWINM OPCD( 21) +#define RLWNM OPCD( 23) #define RLDICL XO30( 0) #define RLDICR XO30( 1) #define RLDIMI XO30( 3) +#define RLDCL XO30( 8) #define BCLR XO19( 16) #define BCCTR XO19(528) @@ -1467,6 +1470,23 @@ static void tcg_out_op (TCGContext *s, TCGOpcode opc, const TCGArg *args, else tcg_out32 (s, SRAW | SAB (args[1], args[0], args[2])); break; + case INDEX_op_rotl_i32: + if (const_args[2]) { + tcg_out_rlw(s, RLWINM, args[0], args[1], args[2], 0, 31); + } else { + tcg_out32(s, RLWNM | SAB(args[1], args[0], args[2]) + | MB(0) | ME(31)); + } + break; + case INDEX_op_rotr_i32: + if (const_args[2]) { + tcg_out_rlw(s, RLWINM, args[0], args[1], 32 - args[2], 0, 31); + } else { + tcg_out32(s, SUBFIC | TAI(0, args[2], 32)); + tcg_out32(s, RLWNM | SAB(args[1], args[0], args[2]) + | MB(0) | ME(31)); + } + break; case INDEX_op_brcond_i32: tcg_out_brcond (s, args[2], args[0], args[1], const_args[1], args[3], 0); @@ -1549,6 +1569,21 @@ static void tcg_out_op (TCGContext *s, TCGOpcode opc, const TCGArg *args, else tcg_out32 (s, SRAD | SAB (args[1], args[0], args[2])); break; + case INDEX_op_rotl_i64: + if (const_args[2]) { + tcg_out_rld(s, RLDICL, args[0], args[1], args[2], 0); + } else { + tcg_out32(s, RLDCL | SAB(args[1], args[0], args[2]) | MB64(0)); + } + break; + case INDEX_op_rotr_i64: + if (const_args[2]) { + tcg_out_rld(s, RLDICL, args[0], args[1], 64 - args[2], 0); + } else { + tcg_out32(s, SUBFIC | TAI(0, args[2], 64)); + tcg_out32(s, RLDCL | SAB(args[1], args[0], 0) | MB64(0)); + } + break; case INDEX_op_mul_i64: tcg_out32 (s, MULLD | TAB (args[0], args[1], args[2])); @@ -1685,6 +1720,8 @@ static const TCGTargetOpDef ppc_op_defs[] = { { INDEX_op_shl_i32, { "r", "r", "ri" } }, { INDEX_op_shr_i32, { "r", "r", "ri" } }, { INDEX_op_sar_i32, { "r", "r", "ri" } }, + { INDEX_op_rotl_i32, { "r", "r", "ri" } }, + { INDEX_op_rotr_i32, { "r", "r", "ri" } }, { INDEX_op_brcond_i32, { "r", "ri" } }, { INDEX_op_brcond_i64, { "r", "ri" } }, @@ -1701,6 +1738,8 @@ static const TCGTargetOpDef ppc_op_defs[] = { { INDEX_op_shl_i64, { "r", "r", "ri" } }, { INDEX_op_shr_i64, { "r", "r", "ri" } }, { INDEX_op_sar_i64, { "r", "r", "ri" } }, + { INDEX_op_rotl_i64, { "r", "r", "ri" } }, + { INDEX_op_rotr_i64, { "r", "r", "ri" } }, { INDEX_op_mul_i64, { "r", "r", "r" } }, { INDEX_op_div_i64, { "r", "r", "r" } }, diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h index 9b8e9a0..9e97985 100644 --- a/tcg/ppc64/tcg-target.h +++ b/tcg/ppc64/tcg-target.h @@ -69,7 +69,7 @@ typedef enum { /* optional instructions */ #define TCG_TARGET_HAS_div_i32 1 -#define TCG_TARGET_HAS_rot_i32 0 +#define TCG_TARGET_HAS_rot_i32 1 #define TCG_TARGET_HAS_ext8s_i32 1 #define TCG_TARGET_HAS_ext16s_i32 1 #define TCG_TARGET_HAS_ext8u_i32 0 @@ -87,7 +87,7 @@ typedef enum { #define TCG_TARGET_HAS_movcond_i32 0 #define TCG_TARGET_HAS_div_i64 1 -#define TCG_TARGET_HAS_rot_i64 0 +#define TCG_TARGET_HAS_rot_i64 1 #define TCG_TARGET_HAS_ext8s_i64 1 #define TCG_TARGET_HAS_ext16s_i64 1 #define TCG_TARGET_HAS_ext32s_i64 1