From patchwork Sat Feb 16 15:45:03 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 220993 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id C81022C0080 for ; Sun, 17 Feb 2013 04:16:53 +1100 (EST) Received: from localhost ([::1]:51021 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U6k1m-0005H1-Hn for incoming@patchwork.ozlabs.org; Sat, 16 Feb 2013 10:50:14 -0500 Received: from eggs.gnu.org ([208.118.235.92]:38745) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U6k0f-00043t-DT for qemu-devel@nongnu.org; Sat, 16 Feb 2013 10:49:07 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1U6k0c-0002H3-9W for qemu-devel@nongnu.org; Sat, 16 Feb 2013 10:49:05 -0500 Received: from cantor2.suse.de ([195.135.220.15]:40350 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U6k0b-0002Gs-Ui for qemu-devel@nongnu.org; Sat, 16 Feb 2013 10:49:02 -0500 Received: from relay1.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 63D6CA398D; Sat, 16 Feb 2013 16:49:01 +0100 (CET) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Sat, 16 Feb 2013 16:45:03 +0100 Message-Id: <1361029542-8412-9-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1361029542-8412-1-git-send-email-afaerber@suse.de> References: <1361029542-8412-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: Michael Walle , =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [Qemu-devel] [PATCH 08/47] target-lm32: Introduce QOM realizefn for LM32CPU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Introduce a realizefn and set realized = true in cpu_lm32_init(). Also move cpu_reset() call from initfn to realizefn. Signed-off-by: Andreas Färber --- target-lm32/cpu-qom.h | 2 ++ target-lm32/cpu.c | 18 ++++++++++++++++-- target-lm32/helper.c | 4 ++-- 3 Dateien geändert, 20 Zeilen hinzugefügt(+), 4 Zeilen entfernt(-) diff --git a/target-lm32/cpu-qom.h b/target-lm32/cpu-qom.h index 400cdbd..d7525b3 100644 --- a/target-lm32/cpu-qom.h +++ b/target-lm32/cpu-qom.h @@ -34,6 +34,7 @@ /** * LM32CPUClass: + * @parent_realize: The parent class' realize handler. * @parent_reset: The parent class' reset handler. * * A LatticeMico32 CPU model. @@ -43,6 +44,7 @@ typedef struct LM32CPUClass { CPUClass parent_class; /*< public >*/ + DeviceRealize parent_realize; void (*parent_reset)(CPUState *cpu); } LM32CPUClass; diff --git a/target-lm32/cpu.c b/target-lm32/cpu.c index eca2dca..6a84f51 100644 --- a/target-lm32/cpu.c +++ b/target-lm32/cpu.c @@ -42,6 +42,18 @@ static void lm32_cpu_reset(CPUState *s) memset(env, 0, offsetof(CPULM32State, breakpoints)); } +static void lm32_cpu_realizefn(DeviceState *dev, Error **errp) +{ + LM32CPU *cpu = LM32_CPU(dev); + LM32CPUClass *lcc = LM32_CPU_GET_CLASS(dev); + + cpu_reset(CPU(cpu)); + + qemu_init_vcpu(&cpu->env); + + lcc->parent_realize(dev, errp); +} + static void lm32_cpu_initfn(Object *obj) { LM32CPU *cpu = LM32_CPU(obj); @@ -50,14 +62,16 @@ static void lm32_cpu_initfn(Object *obj) cpu_exec_init(env); env->flags = 0; - - cpu_reset(CPU(cpu)); } static void lm32_cpu_class_init(ObjectClass *oc, void *data) { LM32CPUClass *lcc = LM32_CPU_CLASS(oc); CPUClass *cc = CPU_CLASS(oc); + DeviceClass *dc = DEVICE_CLASS(oc); + + lcc->parent_realize = dc->realize; + dc->realize = lm32_cpu_realizefn; lcc->parent_reset = cc->reset; cc->reset = lm32_cpu_reset; diff --git a/target-lm32/helper.c b/target-lm32/helper.c index d76ea3f..a6691ad 100644 --- a/target-lm32/helper.c +++ b/target-lm32/helper.c @@ -212,13 +212,13 @@ LM32CPU *cpu_lm32_init(const char *cpu_model) env->num_wps = def->num_watchpoints; env->cfg = cfg_by_def(def); - qemu_init_vcpu(env); - if (tcg_enabled() && !tcg_initialized) { tcg_initialized = 1; lm32_translate_init(); } + object_property_set_bool(OBJECT(cpu), true, "realized", NULL); + return cpu; }