From patchwork Sat Feb 16 15:44:57 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 220967 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 1BC892C0090 for ; Sun, 17 Feb 2013 02:49:13 +1100 (EST) Received: from localhost ([::1]:48375 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U6k0l-0003mB-4y for incoming@patchwork.ozlabs.org; Sat, 16 Feb 2013 10:49:11 -0500 Received: from eggs.gnu.org ([208.118.235.92]:38638) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U6k0X-0003m1-Bz for qemu-devel@nongnu.org; Sat, 16 Feb 2013 10:48:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1U6k0U-0002Ep-RZ for qemu-devel@nongnu.org; Sat, 16 Feb 2013 10:48:57 -0500 Received: from cantor2.suse.de ([195.135.220.15]:40334 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U6k0U-0002Ed-Ix for qemu-devel@nongnu.org; Sat, 16 Feb 2013 10:48:54 -0500 Received: from relay2.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 0D680A39D2; Sat, 16 Feb 2013 16:48:54 +0100 (CET) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Sat, 16 Feb 2013 16:44:57 +0100 Message-Id: <1361029542-8412-3-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1361029542-8412-1-git-send-email-afaerber@suse.de> References: <1361029542-8412-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , Richard Henderson Subject: [Qemu-devel] [PATCH 02/47] target-alpha: Update AlphaCPU to QOM realizefn X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Update the alpha_cpu_realize() signature and hook up to DeviceClass::realize. Set realized = true in cpu_alpha_init(). qapi/error.h is included through qdev now and no longer needed. Acked-by: Richard Henderson [AF: Invoke parent's realizefn] Signed-off-by: Andreas Färber --- target-alpha/cpu-qom.h | 2 ++ target-alpha/cpu.c | 16 ++++++++++++---- 2 Dateien geändert, 14 Zeilen hinzugefügt(+), 4 Zeilen entfernt(-) diff --git a/target-alpha/cpu-qom.h b/target-alpha/cpu-qom.h index 16367d2..c0f6c6d 100644 --- a/target-alpha/cpu-qom.h +++ b/target-alpha/cpu-qom.h @@ -34,6 +34,7 @@ /** * AlphaCPUClass: + * @parent_realize: The parent class' realize handler. * @parent_reset: The parent class' reset handler. * * An Alpha CPU model. @@ -43,6 +44,7 @@ typedef struct AlphaCPUClass { CPUClass parent_class; /*< public >*/ + DeviceRealize parent_realize; void (*parent_reset)(CPUState *cpu); } AlphaCPUClass; diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c index 0ad69f0..0cdae69 100644 --- a/target-alpha/cpu.c +++ b/target-alpha/cpu.c @@ -21,14 +21,16 @@ #include "cpu.h" #include "qemu-common.h" -#include "qapi/error.h" -static void alpha_cpu_realize(Object *obj, Error **errp) +static void alpha_cpu_realizefn(DeviceState *dev, Error **errp) { - AlphaCPU *cpu = ALPHA_CPU(obj); + AlphaCPU *cpu = ALPHA_CPU(dev); + AlphaCPUClass *acc = ALPHA_CPU_GET_CLASS(dev); qemu_init_vcpu(&cpu->env); + + acc->parent_realize(dev, errp); } /* Sort alphabetically by type name. */ @@ -134,7 +136,8 @@ AlphaCPU *cpu_alpha_init(const char *cpu_model) env->cpu_model_str = cpu_model; - alpha_cpu_realize(OBJECT(cpu), NULL); + object_property_set_bool(OBJECT(cpu), true, "realized", NULL); + return cpu; } @@ -250,7 +253,12 @@ static void alpha_cpu_initfn(Object *obj) static void alpha_cpu_class_init(ObjectClass *oc, void *data) { + DeviceClass *dc = DEVICE_CLASS(oc); CPUClass *cc = CPU_CLASS(oc); + AlphaCPUClass *acc = ALPHA_CPU_CLASS(oc); + + acc->parent_realize = dc->realize; + dc->realize = alpha_cpu_realizefn; cc->class_by_name = alpha_cpu_class_by_name; }