From patchwork Fri Feb 15 12:36:42 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter De Schrijver X-Patchwork-Id: 220737 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 916812C0090 for ; Fri, 15 Feb 2013 23:48:42 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161565Ab3BOMsF (ORCPT ); Fri, 15 Feb 2013 07:48:05 -0500 Received: from hqemgate04.nvidia.com ([216.228.121.35]:9739 "EHLO hqemgate04.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1161489Ab3BOMsB (ORCPT ); Fri, 15 Feb 2013 07:48:01 -0500 Received: from hqnvupgp06.nvidia.com (Not Verified[216.228.121.13]) by hqemgate04.nvidia.com id ; Fri, 15 Feb 2013 04:47:49 -0800 Received: from hqemhub02.nvidia.com ([172.17.108.22]) by hqnvupgp06.nvidia.com (PGP Universal service); Fri, 15 Feb 2013 04:46:53 -0800 X-PGP-Universal: processed; by hqnvupgp06.nvidia.com on Fri, 15 Feb 2013 04:46:53 -0800 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server id 8.3.297.1; Fri, 15 Feb 2013 04:47:58 -0800 Received: from thelma.nvidia.com (Not Verified[172.16.212.77]) by hqnvemgw01.nvidia.com with MailMarshal (v6,7,2,8378) id ; Fri, 15 Feb 2013 04:47:58 -0800 Received: from tbergstrom-lnx.nvidia.com (tbergstrom-lnx.nvidia.com [10.21.24.170]) by thelma.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id r1FCccpn014652; Fri, 15 Feb 2013 04:47:54 -0800 (PST) From: Peter De Schrijver To: Peter De Schrijver CC: , , Grant Likely , Rob Herring , Rob Landley , Stephen Warren , Russell King , Prashant Gaikwad , Simon Glass , Mike Turquette , Joseph Lo , , , Subject: [PATCH v7 12/12] clk: tegra: Remove forced clk_enable of uartd Date: Fri, 15 Feb 2013 14:36:42 +0200 Message-ID: <1360931849-7090-13-git-send-email-pdeschrijver@nvidia.com> X-Mailer: git-send-email 1.7.7.rc0.72.g4b5ea.dirty In-Reply-To: <1360931849-7090-1-git-send-email-pdeschrijver@nvidia.com> References: <1360931849-7090-1-git-send-email-pdeschrijver@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The UART driver enables the console uart clock, so we don't need to do that anymore in this file. Signed-off-by: Peter De Schrijver --- drivers/clk/tegra/clk-tegra114.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c index f6c6b67..4175bf1 100644 --- a/drivers/clk/tegra/clk-tegra114.c +++ b/drivers/clk/tegra/clk-tegra114.c @@ -1973,7 +1973,7 @@ static __initdata struct tegra_clk_init_table init_table[] = { {uarta, pll_p, 408000000, 0}, {uartb, pll_p, 408000000, 0}, {uartc, pll_p, 408000000, 0}, - {uartd, pll_p, 408000000, 1}, + {uartd, pll_p, 408000000, 0}, {clk_max, clk_max, 0, 0}, /* This MUST be the last entry. */ };